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Title: | 應用於氮化鎵同步降壓轉換器之具雙側自適應死區時間產生 器之閘極驅動器積體電路 A Gate Driver IC for GaN-Based Synchronous Buck Converter with A Double-Sided Adaptive Dead-Time Generator |
Authors: | 交友識 Giao Huu Thuc |
Advisor: | 陳景然 Ching-jan Chen |
Keyword: | 柵極驅動器 IC;,自適應死區時間控制;,GaN 器件;,DC-DC 轉換器;,粗調/微調控制器;,相位誤差檢測器。, Gate Driver IC;,Adaptive dead-time control;,GaN devices;,DC-DC converter;,Coarse/Fine controllers;,Phase Error Detector., |
Publication Year : | 2023 |
Degree: | 碩士 |
Abstract: | 本論文提出了一種用於具有雙側自適應死區時間發生器 (DTG) 的基於 GaN 的同步降壓轉換器的柵極驅動器 IC,以提高傳統固定或單側 DTG 的轉換器效率。 所提議的驅動器 IC 包含兩個主要子塊,例如相位誤差檢測器 (PED) 和粗調/精細控制器。 應用邊沿檢測原理,所提出的死區時間控制可以最小化死區時間和開關電壓兩端的反向傳導損耗,Vx,使用 e-mode GaN 器件的 1MHz 12 V 至 5 V 降壓轉換器具有 0.2 至 2 A 負載電流範圍。 設計的 IC 採用 TSMC 0.18 μm HVG2 工藝製造。 根據測量結果,1 A 負載電流下的最小死區時間為 47 ps。 在負載條件 I_load=0.8 A 時,峰值效率達到 94.15%。與 10 ns 固定 DTG 相比,模擬效率提高了約 2.16%。 This thesis proposes a gate driver IC for a GaN-based synchronous buck converter with a double-sided adaptive dead-time generator (DTG) to improve the converter efficiency of conventional fixed or single-sided DTGs. The proposed driver IC contains two main sub-blocks such as the phase error detector (PED) and the coarse/fine controllers. Applying the edge detection principle, the proposed dead-time control can minimize the dead-time and reverse conduction loss on both edges of the switching voltage, Vx, of a 1MHz 12 V to 5 V buck converter using e-mode GaN devices with 0.2 to 2 A load current range. The designed IC is fabricated with TSMC 0.18 μm HVG2 process. According to the measurement results, the minimum dead time at 1 A load current is 47 ps. The peak efficiency achieves 94.15 % at load condition I_load=0.8 A. Compared with a 10 ns fixed DTG, the simulated efficiency is improved by approximate 2.16 %. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/90603 |
DOI: | 10.6342/NTU202301049 |
Fulltext Rights: | 同意授權(限校園內公開) |
Appears in Collections: | 電子工程學研究所 |
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ntu-111-2.pdf Restricted Access | 6.82 MB | Adobe PDF | View/Open |
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