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標題: | 應用於微波及毫米波金氧半場效電晶體
壓控振盪器之研製 Design of Microwave and Millimeter-wave CMOS VCOs |
作者: | Chi-Kai Hsieh 謝繼開 |
指導教授: | 林坤佑(Kun-You Lin) |
關鍵字: | 壓控振盪器, VCO,voltage control oscillator, |
出版年 : | 2007 |
學位: | 碩士 |
摘要: | 現代通訊系統中,低相位雜訊、低功耗的壓控振盪器是不可或缺的元件,由於高資料傳輸量的需求,促使我們研究高頻的通訊系統,因此,如何設計高頻率並同時具有低相位雜訊、低功耗的振盪器是一個值得探討的重點。
本論文的主題在於使用金氧半互補式製程,設計並實現微波及毫米波振盪器,研究的方向著重於低相位雜訊和低功耗微波及毫米波振盪器。論文主要可分為三大部分,第一部份介紹振盪器的應用並討論LC型振盪器的原理,第二部份描述考畢子(Colpitts)振盪器的原理及優點,並且提出兩個改良的架構來降低相位雜訊或是降低功耗。論文的最後一部分利用互補式交越耦合振盪器架構結合變壓器迴授的方法以期在低功耗下也會有不錯的相位雜訊,並說明其設計概念與優缺點。 第一個改良考畢子振盪器是為了低相位雜訊的考量。電路的主要架構是在傳統的考畢子架構上加入一個變壓器,藉變壓器的特性,改良考畢子振盪器的缺點,並且使用台積電0.18微米製程來實現。由量測結果顯示,此電路在23.5 GHz、1-MHz位移(offset)時具有-115 dBc/Hz的相位雜訊。第二個改良考畢子振盪器是為了低功耗的考量,電路的主要架構也是利用變壓器的特性,對傳統的考畢子架構作改量,此電路在 23 GHz、1-MHz位移(offset)時具有-100 dBc/Hz的相位雜訊且只需消耗 4 mW。若是在消耗 10 mW,此電路在1-MHz位移(offset)時具有-109 dBc/Hz的相位雜訊。 最後一個振盪器,利用一個三阜的變壓器結合互補式交越耦合架構以期達到低功耗的效果,並且使用台積電0.18微米製程來實現。由量測結果顯示,此電路在8.2 GHz、1-MHz位移(offset)時具有-118.5 dBc/Hz的相位雜訊且僅需消耗0.66 mW的功耗。 A low phase noise and low DC power consumption VCO is indispensable in modern communication systems. Due to the demand for high data transmission drives in high frequency systems, a high frequency oscillator with low phase noise and low DC power consumption is important. The goal of the thesis is to design and implement VCOs in microwave and millimeter-wave region using CMOS technology. This research focuses on low phase noise and low DC power consumption oscillators. The thesis can be divided into three parts. The first part introduces the application of oscillators and discusses the theory of LC-VCO. Next, we discuss the basics and application of Colpitts VCO and two modified Colpitts VCO are proposed for low phase noise or low DC power consumption. In the last part of this thesis, the complementary VCO using transformer feedback is proposed. The VCO maintain the low phase noise while low DC power consumption is considered. Firstly, a modified Colpitts VCO for low phase noise is implemented. The VCO combine a transformer in the conventional Colpitts to improve the phase noise in the high frequency. The VCO operates at 23.5 GHz with phase noise about -115 dBc/Hz at 1-MHz offset. Second modified Colpitts VCO is implemented for low DC power consumption. The VCO use the transformer which replace the inductor and the cross-coupled pair in the conventional Colpitts to lower DC power consumption. The VCO operates at 23 GHz with phase noise about -100 dBc/Hz at 1 MHz offset and only consumes 4 mW. Besides, the VCO has phase noise about -109 dBc/Hz at 1 MHz offset while consumes 10 mW. Finally, the complementary structure with transformer is proposed for ultra low power consumption. The VCO is fabricated by TSMC 0.18-μm CMOS process. From the measurement results, the VCO achieves a phase noise of -118.5 dBc/Hz at 1-MHz offset at 8.2 GHz with 11.7% tuning range and the VCO only consumes 0.66 mW. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41180 |
全文授權: | 有償授權 |
顯示於系所單位: | 電信工程學研究所 |
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