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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/32707
標題: | 電容性感測器之介面電路的設計與實作 Design and Implementation of Interface Circuits for Capacitive Sensors |
作者: | Hsien Yu-Tseng 盂曾賢 |
指導教授: | 呂良鴻 |
關鍵字: | 互補式金氧半電晶體,切換電容式振盪器,電容性感測器,自動歸零,電容數位轉換器, CMOS,switch-capacitor oscillator,capacitive sensor,auto-zero,capacitance-digital converter, |
出版年 : | 2011 |
學位: | 碩士 |
摘要: | 本篇論文旨在介紹電容性感測器之介面電路的設計與實作。此介面電路的特色在於量測隨著外界環境變化而改變的電容值時,其表現費法拉之解析度、高取樣頻率以及高電容範圍之性能。由於此電路之輸出頻率與電容值成線性關係,因此可以透過內插法來計算電容值。本論文藉由0.18-um標準互補式金氧半導體製程,實現了兩個相關的電路。
第一個實作導入了切換電容式混頻器以表現一與電容值改變成正比之輸出頻率。為了節省硬體,此混頻器僅由一運算放大器以及兩個比較器構成。第二個實作中,增加了一自動調整機制,當量測一未知感測器時,此機制能夠調整解析度。為了消除非理想效應,自動歸零機制以及電量消除機制也被引入了這次的實作。輸出信號藉由一組計數器轉化為數位信號後,可透過一多通道數位信號擷取器接受並由電腦直接處理。 在1.8伏特之供應電壓下,兩電路之耗能皆小於9.9毫瓦特。在不計算測試電路以及pads狀況下,其面積皆小於0.1平方毫米。而其功能性以及表現在量測結果中也被進一步驗證。 This thesis illustrates the design and implementation of interface circuits for capacitive sensors. The interface circuit performs femto farad resolution, high sampling rate and wide capacitance range, which is designed for measuring the change of capacitance under physical change. With linear corresponding relationship between capacitance and output frequency, the interpolation is available in capacitance calculation. By using a standard TSMC 0.18-μm CMOS process, there are two circuits implemented. Firstly, the switch-capacitor mixer architecture is introduced to present a linear proportional output frequency to the capacitance change. The proposed sensor interface is simply composed of an operational amplifier and two comparators for reducing the hardware cost. Secondly, the auto-adjustment mechanism is applied to resolution adaption for an unknown sensor. In order to reduce the non-ideal effect, the auto-zero and charge cancellation techniques are also employed in this design. With the digital output data provided by a counter, the raw data can be collected with a multichannel DAQ and then processed directly with a computer. Operated at a 1.8-V supply voltage, the fabricated circuits consume a dc power less than 9.9 mW. Except the testing circuits and pads, the active areas are both less than 0.1 mm2. The functions and performance are verified in the measurement result. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/32707 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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