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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 呂良鴻 | |
dc.contributor.author | Hsien Yu-Tseng | en |
dc.contributor.author | 盂曾賢 | zh_TW |
dc.date.accessioned | 2021-06-13T04:13:52Z | - |
dc.date.available | 2013-08-02 | |
dc.date.copyright | 2011-08-02 | |
dc.date.issued | 2011 | |
dc.date.submitted | 2011-07-28 | |
dc.identifier.citation | [1] B. Razavi, Design of Analog CMOS Integrated Circuits, New York: McGraw-Hill, 2001.
[2] J. David and K. Martin, Analog Integrated Circuits Design, New York: John Wiley & Sons, Inc., 1997. [3] Gerard C. M. Meijer, Smart Sensor Systems, New York: John Wiley & Sons, Ltd., 2008. [4] Fengtian Han, Qiuping Wu, Rong Zhang, Jingxin Dong, “Capacitive sensor interface for an electrostatically levitated micromotor,” IEEE Transaction on Instrumentation and Measurement, vol. 58, no. 10, pp. 3519–3526, Oct. 2009. [5] Preethichandra D.M.G., Shida K., “A simple interface circuit to measure very small capacitance changes in capacitive sensors,” Instrumentation and Measurement Technology Conference, vol. 1, no. 6, Dec. 2000, pp. 406–409. [6] da Rocha, J.G.V., da Rocha, P.F.A., Lanceros-Mendez, S., “Capacitive sensor for three-axis force measurements and its readout electronics,” IEEE Transaction on Instrumentation and Measurement, vol. 58, no. 8, pp. 2830–2836, Aug. 2009. [7] Singh, T., Saether, T., Ytterdal, T., “Current-mode capacitive sensor interface circuit with single-ended to differential output capability,” IEEE Transaction on Instrumentation and Measurement, vol. 58, no. 11, pp. 3914–3920, Nov. 2009. [8] Ayers, S., Gillis, K.D., Lindau, M., Minch, B.A., “Design of a CMOS potentiostat circuit for electrochemical detector Arrays,” IEEE Transaction on Circuit and System, vol. 54, no. 4, pp. 736–744, Apr. 2007. [9] Pennisi, S., “High-performance and simple CMOS interface circuit for differential capacitive sensors,” IEEE Transaction on Circuit and System, vol. 52, no. 6, pp. 327–330, Jun. 2005. [10] Li, X., Meijer, G.C.M., “A capacitive-sensor interface circuit based on a first-order charge-balanced SC-oscillator,” Instrumentation and Measurement Technology Conference, vol. 1, May 2001, pp. 282-285. [11] Ghafar-Zadeh, E., Sawan, M., “A CMOS-based capacitive sensor for laboratory-on-chips design and experimental results,” IEEE International Symposium on Circuit and System, Jun. 2007, pp. 85–88. [12] Nojdelov, R., Nihtianov, S., “A fast interface for low-value capacitive sensors with improved accuracy,” Instrumentation and Measurement Technology Conference, May 2008, pp. 1756-1760. [13] Heidary, A., Meijer, G.C.M., “A low-noise switched-capacitor front end for capacitive sensor,” IEEE Sensors Conference, Dec. 2007, pp. 40-43. [14] Cheng-Ta Chiang, Yu-Chung Huang, “A semicylindrical capacitive sensor with interface circuit used for flow rate measurement,” IEEE Sensor Journal, vol. 6, no. 6, pp. 1564-1570, Dec. 2006. [15] Heidary, A., Meijer, G.C.M., “Features and design constraints for an optimized SC front-end circuit for capacitive sensors with a wide dynamic range,” Solid-State Circuits, vol. 43, no. 7, pp. 1609-1616, Jul. 2008. [16] Ali-Bakhshian, M., Roberts, G.W., “A semi-digital interface for capacitive sensors,” IEEE International Symposium on Circuit and System, Jun. 2009, pp. 1957-1960. [17] Bruschi, P., Nizza, N., Dei, M., “A low-power capacitance to pulse width converter for MEMS interfacing,” Solid-State Circuit Conference, Nov. 2008, pp. 446-449. [18] Benini, L., Guiducci, C., Paulus, C., “Electronic detection of DNA hybridization toward CMOS microarrays,” Design & Test of Computers, vol. 24, no. 1, pp. 38-48, May 2007. [19] Shi-Wei Wang, Lu, M.S.-C., “CMOS capacitive sensors with sub-m microelectrodes for biosensing applications,” IEEE Sensor Journal, vol. 10, no. 5, pp. 991-996, May 2010. [20] Haider, M.R., Mahfouz, M.R., Islam, S.K., Eliza, S.A., Qu, W., Pritchard, E., “A low-power capacitance measurement circuit with high resolution and high degree of linearity,” MWSCAS Symposium on Circuit and System, Sep. 2008, pp. 261-264. [21] Naiknaware, R., Fiez, T.S., “Process-insensitive low-power design of switched-capacitor integrator,” IEEE Transaction on Circuit and System, vol. 51, no. 10, pp. 1940–1952, Oct. 2004. [22] Cheng-Ta Chiang, Chi-Shen Wang, Yu-Chung Huang, “A monolithic CMOS autocompensated sensor transducer for capacitive measuring systems,” IEEE Transaction on Instrumentation and Measurement, vol. 57, no. 11, pp. 2472-2486, Nov. 2008. [23] C. C. Enz and G. C. Temes, “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling, and Chopper Stabilization,” Proceedings of the IEEE, vol. 84, no. 11, Aug. 1996, pp. 1584-1614. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/32707 | - |
dc.description.abstract | 本篇論文旨在介紹電容性感測器之介面電路的設計與實作。此介面電路的特色在於量測隨著外界環境變化而改變的電容值時,其表現費法拉之解析度、高取樣頻率以及高電容範圍之性能。由於此電路之輸出頻率與電容值成線性關係,因此可以透過內插法來計算電容值。本論文藉由0.18-um標準互補式金氧半導體製程,實現了兩個相關的電路。
第一個實作導入了切換電容式混頻器以表現一與電容值改變成正比之輸出頻率。為了節省硬體,此混頻器僅由一運算放大器以及兩個比較器構成。第二個實作中,增加了一自動調整機制,當量測一未知感測器時,此機制能夠調整解析度。為了消除非理想效應,自動歸零機制以及電量消除機制也被引入了這次的實作。輸出信號藉由一組計數器轉化為數位信號後,可透過一多通道數位信號擷取器接受並由電腦直接處理。 在1.8伏特之供應電壓下,兩電路之耗能皆小於9.9毫瓦特。在不計算測試電路以及pads狀況下,其面積皆小於0.1平方毫米。而其功能性以及表現在量測結果中也被進一步驗證。 | zh_TW |
dc.description.abstract | This thesis illustrates the design and implementation of interface circuits for capacitive sensors. The interface circuit performs femto farad resolution, high sampling rate and wide capacitance range, which is designed for measuring the change of capacitance under physical change. With linear corresponding relationship between capacitance and output frequency, the interpolation is available in capacitance calculation. By using a standard TSMC 0.18-μm CMOS process, there are two circuits implemented.
Firstly, the switch-capacitor mixer architecture is introduced to present a linear proportional output frequency to the capacitance change. The proposed sensor interface is simply composed of an operational amplifier and two comparators for reducing the hardware cost. Secondly, the auto-adjustment mechanism is applied to resolution adaption for an unknown sensor. In order to reduce the non-ideal effect, the auto-zero and charge cancellation techniques are also employed in this design. With the digital output data provided by a counter, the raw data can be collected with a multichannel DAQ and then processed directly with a computer. Operated at a 1.8-V supply voltage, the fabricated circuits consume a dc power less than 9.9 mW. Except the testing circuits and pads, the active areas are both less than 0.1 mm2. The functions and performance are verified in the measurement result. | en |
dc.description.provenance | Made available in DSpace on 2021-06-13T04:13:52Z (GMT). No. of bitstreams: 1 ntu-100-R98943033-1.pdf: 3098158 bytes, checksum: e4c6476af14288d3fb58f878917a814f (MD5) Previous issue date: 2011 | en |
dc.description.tableofcontents | Acknowledgement ……………………………………………………………………...............................I
Abstract………………………………………………………………………………................................V Table of Contents…………………………………………………………………………….…………..IX List of Figures……………………………………………………………………………………….....XIII List of Tables……………………………………………………………………………………...…...XVII CHAPTER 1 INTRODUCTION……………………………………………………………………...1 1.1 MOTIVATION…………………………………………………………………………………1 1.2 THESIS OVERVIEW………………………………………………………………………….4 CHAPTER 2 BACKGROUND…………………………………………………………………….....7 2.1 BASIC CONCEPTS OF CAPACITIVE SENSOR ...…………………………………………7 2.2 VARIED APPROACHES OF THE INTERFACE CIRCUITS ...………..………..…………11 2.2.1 AC VOLTAGE AMPLIFICATION .........................................................11 2.2.2 TRANSIMPEDANCE AMPLIFICATION ……...…………………………………….12 2.2.3 CHARGE AMPLIFICATION …...………………………………………………..…...13 2.2.4 TIME DOMAIN ANALYSIS AND OSCILLATOR TECHNIQUES …..………...…...15 2.3 PARAMETERS OF SENSING INTERFACE CIRCUITS ………..………...……..………..15 2.3.1 SENSITIVITY .........................................................................................16 2.3.2 RESOLUTION ...........................................……...…………………………………….16 2.3.3 DYNAMIC RANGE ..............…...………………………………………………..…...17 2.3.4 SAMPLING RATE .............................................................................…..………..…...18 2.3.5 ACCURACY ..........................................................................................18 2.4 DESIGN METHODOLOGY ...……………………..……………………………………….18 CHAPTER 3 A NOVEL SENSING INTERFACE FOR CAPACITIVE SENSORS……....…......21 3.1 INTRODUCTION ...…………………………………………………………………………22 3.2 THE PROPOSED SENSING INTERFACE CIRCUIT ARCHITECTURE ...………..……..24 3.2.1 SWITCH-CAPACITOR OSCILLATOR ………………………………………………25 3.2.2 SWITCH-CAPACITOR MIXER ……………………………………………………...28 3.3 DESIGN CONSIDERATION OF SWITCH-CAPACITOR MIXER ………………..............32 3.3.1 OPERATIONAL AMPLIFIER ………..………………………………………………32 3.3.2 COMPARATOR ………………..……………………………………………………...34 3.3.3 INTEGRAL CAPACITOR …...………..………………………………………………35 3.3.4 TIMEING SCHEDULE OF SWITCHES ………………..………………….………...36 3.4 NON-IDEAL EFFECTS DISCUSSION ……………..…………….………………………..37 3.4.1 CHARGE INJECTION AND CLOCK FEEDTHROUGH …...………………………37 3.4.2 QUANTIZATION ERROR AND RESOLUTION ……...…………………..………...38 3.4.3 OFFSET AND FLICKER NOISE …...………..…………….…………………………39 3.5 EXPERIMENTAL RESULTS………………………………………………………………..40 3.6 CONCLUSION……………………………………………………………………………….43 CHAPTER 4 A CAPACITANCE-TO-DIGITAL SENSING INTERFACE WITH RESOLUTION ADAPTION .......................………………………………………………………………………............45 4.1 INTRODUCTION……………………………………………………………………………46 4.2 THE PROPOSED SENSING INTERFACE CIRCUIT ARCHITECTURE ...………..……..49 4.2.1 MODIFIED SWITCH-CAPACITOR MIXER ……………..…..……………………..49 4.2.2 COUNTER AND LATCHES ...……..…….…………………………………………..53 4.2.3 DIGITAL CONTROL, DAC AND AUTO-ADJUSTMENT.……..…….……………..54 4.3 CIRCUIT TECHNIQUES FOR ELIMINATING NON-IDEAL EFFECTS ...………..……..57 4.3.1 AUTO-ZERO ……………..…..……………………………………………...………..57 4.4 EXPERIMENTAL RESULTS………………………………………………………………..59 4.5 CONCLUSION……………………………………………………………………………….67 CHAPTER 6 CONCLUSION..............................................................................................................69 BIBLIOGRAPHY ...……………………………………………………………………..………………71 | |
dc.language.iso | en | |
dc.title | 電容性感測器之介面電路的設計與實作 | zh_TW |
dc.title | Design and Implementation of Interface Circuits for Capacitive Sensors | en |
dc.type | Thesis | |
dc.date.schoolyear | 99-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 黃俊郎,林宗賢,鄭裕庭 | |
dc.subject.keyword | 互補式金氧半電晶體,切換電容式振盪器,電容性感測器,自動歸零,電容數位轉換器, | zh_TW |
dc.subject.keyword | CMOS,switch-capacitor oscillator,capacitive sensor,auto-zero,capacitance-digital converter, | en |
dc.relation.page | 74 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2011-07-28 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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