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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/26484
標題: | 類比積體電路佈線自動化與最佳化 Routing for Analog Integrated Circuits |
作者: | Kai-Chi Hsu 許凱琦 |
指導教授: | 張耀文 |
關鍵字: | 類比電路,自動化,繞線,干擾,長度對秤, analog design,physical design,routing,crosstalk,length matching, |
出版年 : | 2008 |
學位: | 碩士 |
摘要: | In the modern electronic system, most parts of it are designed with digital integrated
circuits, but analog circuits still exist in the system since they are the bridges between the digital circuits and human world. However, in the analog design flow, the automation tools are still very immature. Therefore, the part of the analog design has become the bottleneck of the whole mixed-signal design. To reduce the mismatches of symmetry circuits in the analog circuits which degrade their performance, the designer needs to consider many constraints during layout generation. However, many parameters cannot be extracted directly by just observing the layout polygons. For example, crosstalk noise of a net induced by other neighboring nets needs complex computation, and the complex computation is beyond the designers can handle. In this thesis, we propose an analog circuit routing algorithm considering wirelength minimization and crosstalk noise optimization with analog circuit constraints, length matching and crosstalk matching constraints. We also provide a crosstalk noise model which is suitable for analog circuits. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/26484 |
全文授權: | 未授權 |
顯示於系所單位: | 電機工程學系 |
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ntu-97-1.pdf 目前未授權公開取用 | 598.21 kB | Adobe PDF |
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