應用機器學習設計之D頻帶波導至傳輸線轉接結構

Abstract

本論文設計、模擬並量測兩種用於太赫茲頻段的波導至平面電路轉接結構，目標為實現涵蓋 D 頻段（110–170 GHz）的全頻操作。第一種結構為波導至偶合微帶線（coupled MS）轉接，採用整合導向器（director）的領結天線（bowtie antenna）以增進頻寬與匹配表現。第二種結構透過 40 度徑向 stub balun，將偶合微帶訊號轉換為單條微帶線（single MS），有助於後續與其他平面電路的整合。 為提升設計效率並克服傳統人工調參的限制，本研究導入機器學習輔助的最佳化流程。設計流程結合了拉丁超立方取樣（LHS）、隨機森林回歸模型（RF）、特徵重要性分析與主動學習循環。本論文提出兩種應用案例：一為基於特徵重要性之局部最佳化，另一則自頭開始以模型引導探索並進行爬山法強化，兩者皆成功達成 D 頻段全頻寬要求，且在傳輸性能上超越傳統設計。 本研究進一步實作實體轉接結構，並於背對背波導平台進行量測。實測插入損耗皆落在可接受範圍內，模擬與實測之間的誤差約為 1.5–1.6 dB，主要歸因於波導導體損失與 UG-387 法蘭接觸不完全等物理因素。整體結果驗證本研究所設計之轉接結構的可行性與系統整合性。 本論文所提出之轉接架構與最佳化流程，為未來太赫茲系統封裝與第六代（6G）通訊、衛星鏈路整合應用提供具實用性與可擴展性的解決方案。

This thesis presents the design, simulation, and measurement of two high-frequency transition structures connecting waveguides to planar circuits, specifically targeting full-band operation across the D-band (110–170 GHz). The first structure, a waveguide-to-coupled microstrip transition, employs a bowtie antenna with integrated directors to enhance bandwidth and matching. The second structure converts the coupled signal to a single microstrip line using a 40 degree radial stub balun, enabling broader integration with planar RF systems. To improve design efficiency and overcome the limitations of manual tuning, a machine learning (ML)-aided optimization methodology is introduced. This workflow integrates Latin Hypercube Sampling, random forest regression, feature importance analysis, and an active learning loop. Two ML design cases are presented: one uses model-guided refinement based on feature importance, and the other adopts full-cycle exploration and local optimization. Both designs achieved full D-band bandwidth with improved transmission metrics compared to conventional methods. Fabricated prototypes were measured using back-to-back waveguide setups. The measured insertion losses remained within acceptable limits, with consistent simulation-to-measurement deviation around 1.5–1.6 dB, attributed primarily to waveguide and flange-related imperfections. The results confirm the viability of the proposed transitions and validate the joint chip and waveguide co-design. The proposed structures and methodology provide practical and scalable solutions for terahertz system integration and offer insights for future high-frequency packaging in 6G and satellite communication applications.