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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
Please use this identifier to cite or link to this item: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96235
Title: 基於機器學習的自適應晶圓級測試以保留診斷信息
ML-based Adaptive Wafer Sort to Preserve Diagnostic Information
Authors: 劉昀昇
Yun-Sheng Liu
Advisor: 李建模
Chien-Mo Li
Keyword: 減少測試時間,自適應測試,機器學習,診斷資訊,
test time reduction,adaptive tests,machine learning,diagnostic information,
Publication Year : 2024
Degree: 碩士
Abstract: 隨著集成電路的複雜性進步,晶圓測試面臨著平衡測試時間、測試品質和診斷信息保存的困難。一方面,我們需要高品質的晶圓測試來在早期測試階段檢測出有缺陷的晶片。另一方面,高品質的晶圓測試可能耗時較長。此外,有關有缺陷晶粒的診斷信息對於提高產量至關重要。作為回應,我們提出了一種基於機器學習模型的自適應晶圓測試方法,在測試待測晶片時使用機器學習模型。通過跳過某些測試群組,自適應方法可以在保持高品質和保存診斷信息的同時節省測試時間。自適應晶圓測試可以減少多達39%的測試時間。與傳統的晶圓測試相比,自適應晶圓測試減少了7.8倍的缺陷晶片分選和338倍的測試失效訊息損失。
As the complexity of integrated circuits advances, wafer sort faces the difficulty of balancing test time, test quality, and diagnostic information preservation. On the one hand, we need a high-quality wafer sort that detects defective chips at the early test stage. On the other hand, high-quality wafer sort can be time-consuming. In addition, diagnostic information about defective dies is crucial to improve the yield. In response, we propose an ML-based adaptive wafer sort using machine learning models when testing a die-under-test (DUT). By skipping some test suites, the adaptive method can save test time while retaining high quality and preserving diagnostic information. The adaptive wafer sort can reduce up to 39% of test time. The adaptive wafer sort improves bin swap and failure information loss by 7.8× and 338× compared to the traditional wafer sort.
URI: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/96235
DOI: 10.6342/NTU202401650
Fulltext Rights: 未授權
Appears in Collections:電子工程學研究所

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