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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/94291| 標題: | 使用可變增益放大器在CMOS 90 nm製程下實現 Ka-band訊號功率偵測系統 A Ka-band Power Detector System using Variable Gain Amplifier in 90 nm CMOS process |
| 作者: | 黃永寬 Yong-Kuan Huang |
| 指導教授: | 盧信嘉 Hsin-Chia Lu |
| 關鍵字: | 毫米波,第五代通訊,功率偵測電路,共閘極功率偵測系統,整流器,可切換增益放大器,單刀雙切開關, millimeter wave,5G communication,power detector,common gate rectifier,rectifier,variable gain amplifier,SPDT switch, |
| 出版年 : | 2024 |
| 學位: | 碩士 |
| 摘要: | 本論文提出一應用於Ka-Band之毫米波頻段功率偵測電路,主要操作頻率在28GHz,主要應用於第五代通訊系統上。
本論文所提出之第一個電路為透過單刀雙切(SPDT)開關切換之Ka頻段雙路功率量測系統,使用台積電所提供的90奈米製程,晶片全面積為0.7mm*0.7mm,整體系統輸入為射頻訊號並且透過電路將其轉為直流電壓輸出。本電路為雙路平行架構,第一路架構為可變增益放大器串接共閘極功率偵測器,透過可變增益放大器之增益可使本路徑量測到較小的功率。第二路架構僅搭載單一共閘極功率偵測器,主要是為了較大的功率範圍而設計,利用開關控制進行路徑之選擇,提升全晶片之功率量測範圍。本論文所提出之偵測系統在輸入頻率為28GHz時,模擬結果之偵測範圍為-44.65 dBm至9.8 dBm,靜態直流功耗為34.6mW,量測結果失敗,發現平行式可切換輸入造成輸入阻抗的變化較大,導致輸入匹配的困難,因此將電路改良後進行新版本的下線。 本論文所提出的第二個電路為優化的版本,將第一個電路的單刀雙切(SPDT)開關移除,使用可變增益放大器來控制增益變化,達到控制訊號增益從0dB到24dB間皆可自由調整,全晶片面積為0.61mm*0.62mm,應用台積電90奈米製程。在輸入頻率為28GHz時,模擬結果之偵測範圍為-40.5dBm至1.5 dBm,靜態直流功耗為48.5mW,量測結果之偵測範圍為-35dBm至10dBm,靜態直流功耗為44.4mW。 This thesis presents a power detector system in Ka-band for 5G communication and its operating frequency is 28GHz. The first and second chip in this thesis use a parallel schematic which converts radio frequency input power to dc output. These chips are both fabricated in TSMC 90-nm CMOS process and the chip size is 0.7mm*0.7mm. The proposed power detector use a SPDT switch to switch between two different paths. One path is combined with variable gain amplifier and power detector to detect small input power. The other path has only one common gate power detector for large input power. With SPDT switch control, this chip can realize simulated dynamic range from -44.65dBm to 9.8dBm at 28GHz. The simulated dc power consumption is 34.6mW with supplied voltage at 1.2V. These two chips are both failed due to input impedence mismatch and immature layout. The third chip is an optimized version of first and second chip. By remove SPDT switch and use only one path VGA and detector, we can match the input impedence to 50Ω more easilly. With variable gain amplifer, we can control voltage gain from 0dB to 24dB. The chip size is 0.61mm*0.62mm, also be fabricated in TSMC 90-nm CMOS process. The simulated dynamic range is from -40.5 dBm to 1.5 dBm at 28GHz. The simulated dc power consumption is 48.5mW with supplied voltage at 1.2V. The measured dynamic range is from -35 dBm to 10 dBm at 28GHz. The measured dc power consumption is 44.4mW with supplied voltage at 1.2V. |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/94291 |
| DOI: | 10.6342/NTU202403246 |
| 全文授權: | 同意授權(全球公開) |
| 顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-112-2.pdf | 6.12 MB | Adobe PDF | 檢視/開啟 |
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