具有製程電壓溫度不敏感性巢狀環形放大器之十一位元十億赫茲管線式類比數位轉換器

Abstract

本論文提出了一種結合動態偏壓和增益提升技術的巢狀環形放大器。所提出之新型放大器在提升增益至近90分貝的同時，保留了環形放大器原本的高迴轉率特性，該架構有助於改善速度與解析度間的設計權衡。此放大器被應用在一個無需校準的十一位元十億取樣頻率單通道管線式線類比數位轉換器系統。與此同時，我們也提出相對應的偏壓電路來緩解環形放大器容易受製程、電壓和溫度變異影響的缺點。

此類比數位轉換器利用28奈米技術製造，在十億赫茲的取樣頻率下，可測得53.52分貝的訊號對雜訊失真比，同時僅耗能14.7毫瓦，量測供應電壓為1伏特，並且達到了159分貝的Schreier效能指標。

In this thesis, we propose a nested ring amplifier that combines dynamic bias and gain-boost techniques. The proposed amplifier significantly enhances gain, achieving nearly 90 dB, while retaining the high-slew capability inherent in ring amplifiers. This enhancement relaxes speed and resolution constraints. The amplifier is implemented in a calibration-free 11-bit 1GS/s single-channel pipelined ADC. Furthermore, the proposed biasing circuits are used to alleviate the process, voltage, and temperature (PVT) -sensitive issues associated with ring amplifiers.

Fabricated in a 28-nm CMOS technology, the ADC achieves 53.52-dB SNDR under sampling rate of 1GS/s, consuming 14.7 mW from a 1-V supply and yielding a Schreier figure-of-merit (FoMs) of 159 dB.