基於進階HQEMU之動態二進制碼向量化

Abstract

在平行處理中，自動向量化技術已被編譯器用來善用資料層級的平行化。然而，因為處理器架構一直在提升向量處理(Vector)或單指令多資料流(SIMD)的能力，所以舊的應用程式沒辦法善用新的Vector/SIMD的能力。例如舊的ARMv7二進制執行檔不能從ARMv8的雙精度浮點運算的SIMD得到好處，舊的x86二進制執行檔沒辦法享受AVX-512的新功能。 在這篇論文中，我們探討在跨指令集架構動態二進制碼轉譯器的基礎問題，該如何將非向量化的迴圈轉換成Vector/SIMD的形式，使得應用程式在新的處理器上可以獲得更高的計算輸出量。核心概念是從這些應用程式的二進制檔還原重要的迴圈資訊，使得迴圈可以被自動向量化。實驗結果顯示，對於不同的benchmark，我們的方法可以在ARMv 到ARMv8的動態二進制碼轉譯中相較於ARMv7 Native獲得1.42倍的效能提升。

Auto vectorization techniques have been adopted by compilers to exploit data-level parallelism in parallel processing for decades. However, since processor architectures have kept enhancing with new features to improve vector/SIMD performance, legacy application binaries failed to fully exploit new vector/SIMD capabilities in modern architectures. For example, legacy ARMv7 binaries cannot benefit from ARMv8 SIMD double precision capability, and legacy x86 binaries cannot enjoy the power of AVX-512 extensions. In this thesis, we study the fundamental issues involved in cross-ISA Dynamic Binary Translation (DBT) to convert non-vectorized loops to vector/SIMD forms to achieve greater computation throughput available in newer processor architectures. The key idea is to recover critical loop information from those application binaries in order to carry out vectorization at runtime. Experiment results show that our approach achieves an average speedup of 1.42x compared to ARMv7 native run across various benchmarks in an ARMv7-to-ARMv8 dynamic binary translation system.