天文接收機之放大器和第五代行動通訊之功率放大器的研究

Abstract

本論文包含三個部分。第一部分是應用於下個世代的無線電天文接收機的K頻段極低功耗的低雜訊放大器，使用65奈米金氧半場效電晶體製程設計。第二部分是應用於無線電射頻天文接收機的W頻段功率放大器，使用0.1微米砷化鎵假型高速場效電機體(pHEMT)製程設計。最後一部分是應用於毫米波第五代無線通訊系統的28十億赫茲(GHz)功率放大器，使用90奈米金氧半場效電晶體製程設計。 論文的第一部分呈現了一個使用65奈米CMOS的K頻段極低功耗低雜訊放大器。此電路使用了閘源極變壓器回授技術來同時達到阻抗和雜訊匹配，單端中和技術也被應用在這個電路。量測結果顯示本文提出的低雜訊放大器在22.5 GHz的頻率下有19.1 dB的小訊號增益和2.8 GHz的3 dB頻寬，且在22.5 GHz的頻率有3.6 dB的雜訊指數在有限的0.99 mW的功耗下。 在第二部分，提出了一個使用0.1微米砷化鎵假型高速場效電晶體製程的W頻段功率放大器。為了提升放大器的頻寬，輸出網路使用了兩段式匹配網路。量測結果顯示此功率放大器在82GHz的頻率有11.5-dB 的小訊號增益和15 GHz的3-dB增益頻寬從78-93 GHz，也提供了19.6 dBm的輸出飽和功率、18.2 dBm的輸出功率的增益1dB壓縮點(OP1dB)和12.8%的峰值功率附加效率(PAEpeak)。 最後一部分，提出了一個使用90奈米金氧半場效電晶體製程設計28 GHz F類功率放大器。此功率放大器是一個差動放大器的架構，且單端使用共源極電晶體。諧波調整的網路被建構在輸出端來提升功率效率。此外，本文也提出一個偏壓選擇方法來最佳化電路的線性度和功率退回(power back off)效率。量測結果顯示本文提出的功率放大器在28 GHz的頻率下有12.0 dB的小訊號增益和7.4 GHz的3 dB頻寬；此電路在28 GHz的頻率下也提供了14.9 dBm的輸出飽和功率和43.8%的峰值功率附加效率，還得到14.0 dBm的輸出功率的增益1dB壓縮點，其輸出功率下的功率附加效率也達到42%。在調變量測使用64-QAM的信號下，此功率放大器也達到了2.1/4.2 Gbit/s的資料傳輸速度、10.6/8.1 dBm的平均輸出功率和29.5/22.6%的平均功率附加效率，且方均根的錯誤向量大小(EVM)小於-25 dB。

This thesis consists of three parts. The first part is a K-band ultra-low-power low noise amplifier fabricated in 65-nm CMOS process for next-generation radio astronomical receivers. Another presents a W-band power amplifier fabricated in 0.1-μm GaAs pHEMT process for wideband radio astronomical receiver. The other describes a 28-GHz high linearity and high efficiency power amplifier fabricated in 90-nm CMOS process for fifth-generation wireless systems. In the first part, an ultra-low-power K-band low noise amplifier (LNA) fabricated in 65-nm CMOS technology is presented. A gate-source transformer-feedback technique is utilized for simultaneous noise and input impedance matching. In order to achieve high gain with limited dc power consumption (PDC), a single-ended neutralization technique is applied to the circuit. The proposed K-band LNA achieves a 19.1-dB small signal gain with 2.8-GHz 3-dB bandwidth (21.2-24 GHz) and a noise figure of 3.6 dB with only 0.99-mW PDC at 22.5 GHz. In the second part, a monolithic W-band power amplifier (PA) in 0.1-μm depletion mode (D-mode) Gallium Arsenide (GaAs) pHEMT process is presented. In order to increase the bandwidth, two-section network for output is utilized. The proposed PA achieves a 11.5-dB small signal gain with 15-GHz 3-dB bandwidth (78-93 GHz), a saturated output power (Psat) of 19.6 dBm, an output 1-dB compression point (OP1dB) of 18.2 dBm, and a maximum power added efficiency (PAEpeak) of 12.8% at 82 GHz. In the last part, a 28-GHz Class-F power amplifier (PA) fabricated in 90-nm CMOS technology is presented. This PA is a differential pair amplifier topology consisted of two common-source (CS) cells. The harmonic-tuned network is constructed at output to enhance the power efficiency. Besides, the bias selection is discussed to optimize the linearity, also to increase the power back-off efficiency. The proposed Class-F PA achieves a 12-dB small-signal gain with 7.4-GHz 3-dB bandwidth (25.1-32.5 GHz), 14.9-dBm Psat with 43.8% peak PAE, and 14.0-dBm OP1dB with 42.0% PAE1dB at 28 GHz. With the single-carrier 64-QAM signal, this PA achieves 2.1/4.2 Gbit/s data rate, 10.6-dBm/8.1-dBm average output power, and 29.5%/22.6% average PAE, while maintaining root-mean-square (rms) error vector magnitude (EVM) better than -25 dB.