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Title: | 應用於橋式電路感測系統之振盪器基礎的連續時間三角積分器 VCO-Based Continuous-Time Delta-Sigma ADC for Bridge Sensor Applications |
Authors: | Ming-Yen Ho 何明諺 |
Advisor: | 林宗賢 |
Keyword: | 低功率,壓控震盪器基礎之類比數位轉換器,橋式感測器之應用,三角積分調變器, Low Power,VCO-based ADC,Bridge Sensor Application,Delta-Sigma Modulator, |
Publication Year : | 2015 |
Degree: | 碩士 |
Abstract: | 橋式感測器廣泛運用在許多量測,像是溫度感測、壓力感測。傳統生醫訊號感測器需要許多電路來實現,包括低雜訊放大器、反鋸齒濾波器和非連續的類比數位轉換器。這些系統包含需多高增益的開放式電路,遠高於用一個回授電路所需要的增益要求。這會造成需要更多的能量消耗,以及增加生醫感測讀取系統上類比電路設計的複雜度。
這裡所提出來的架構是一個Gm-C 為基礎連續時間的三角積分器且採用震盪器基礎的量化器。這個架構取代了傳統架構,因為此架構具有天生的反鋸齒濾波器和天生的動態原件匹配。並且達到高輸入阻抗、低功率消耗和高解析度。然而,運用在準確的橋式電路感測器會受限於非線性的輸入端。此外震盪器的非線性轉移函數也會嚴重的限制整個系統的效能。在我們的電路利用一個相同非線性的電路做負回授。這樣可以消除偶數次的頻調,且可以壓抑輸入端所造成的非線性。我們採用係數調整技巧讓震盪器的輸入訊號的振幅變小,跟之前的震盪器基礎之類比數位轉換器相比,是一個最簡單的方式來改善震盪器的線性度。 本案是用台積電90奈米互補式金屬半製程來做設計和實現。此系統頻寬為1 kHz,取樣頻率為1 MHz,在1 V的操作電壓下,功率消耗為586 uW。 Bridge sensors have been widely applied to accurate measurement of physical quantities such as temperature, pressure, strain or altitude. In order to meet these requirements, conventional biomedical sensor readout systems use multiple stages, typically including a low noise amplifier, an anti-aliasing filter and a discrete-time (DT) delta-sigma modulator (∆ƩM). As a result, such a system involves several high-gain loops with total open-loop gain, far exceeding the required gain of a closed loop. Hence, it can lead to more power dissipation and increase the complexity in the design of analog biomedical sensor readout system. The architecture proposed in this study is a Gm-C-based continuous-time (CT) delta-sigma modulator (∆ƩM) with a VCO-based quantizer. The architecture replaces original sensor readout system and draws a lot of attention due to its inherent anti-alias filtering, inherent DEM for DAC, producing high input impedance, low power consumption and high resolution. However, the usage in precision applications such as a bridge sensor readout system is limited by the non-linearity input stage. Additionally, the nonlinear transfer function of VCO also severely limits the total system performance. Hence, the following method is taken to solve these issues. In our work, we employ an identical nonlinear element in the negative feedback path. It can cancel the even order harmonic tones and suppress the nonlinearity of input. We use parameter scaling technique to reduce VCO input swing. Compared with previous VCO-based ADC, it is the simplest way to improve VCO non-linearity. The proposed work is designed and implemented in TSMC 90-nm CMOS technology. The system bandwidth is designed at 1 kHz with 1MHz sampling frequency. It consumes 586 uW from a 1V supply. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51691 |
Fulltext Rights: | 有償授權 |
Appears in Collections: | 電子工程學研究所 |
Files in This Item:
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ntu-104-1.pdf Restricted Access | 7.04 MB | Adobe PDF |
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