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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
Please use this identifier to cite or link to this item: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41404
Title: 可降低功率消耗與穩定浮動閘線的非晶矽閘極驅動電路設計
A Segmented a-Si Gate Driver Design for Power Reduction and Floating Gate Line Stabilization
Authors: Po-Hsun Chiu
邱柏薰
Advisor: 黃俊郎(Jiun-Lang Huang)
Keyword: 閘極驅動器,低功率,浮動閘線,
gate drivers,low power,floating gate line,
Publication Year : 2009
Degree: 碩士
Abstract: 隨著顯示技術的發展與消費需求的增加,輕、薄、短、小跟低功率已經變成現在顯示器的兩大發展趨勢。其中一個縮小面積的方法是將周邊的閘極驅動器整合在面板上。在這篇論文中,我們提出了一個針對這種方法的低功耗閘極驅動器電路。這種電路設計可以大幅的降低功率消耗並且幫助穩定浮動閘線。
With the recent advance in display technology and consumer demands, compact form factor and low power consumption has become the trend of modern displays. One popular approach to reduce the form factor is to integrate the gate drivers on the same glass as the display. In this thesis, we propose a low power gate driver design for such displays. It not only substantially lowers the power consumption but also help stabilize the floating gate lines.
URI: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41404
Fulltext Rights: 有償授權
Appears in Collections:電子工程學研究所

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