Please use this identifier to cite or link to this item:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38653| Title: | 在可程編系統單晶片上針對特定應用的設計方法 An Application Specific Design Methodology for System-On-a-Programmable-Chip |
| Authors: | Yu-Chang Chang 張郁昌 |
| Advisor: | 王勝德(Sheng-De Wang) |
| Keyword: | 設計方法,硬體加速,可編程邏輯元件,可程編系統單晶片,有限脈衝響應濾波器, Design Methodology,Hardware Acceleration,FPGA,SOPC,FIR, |
| Publication Year : | 2005 |
| Degree: | 碩士 |
| Abstract: | Field Programmable Gate Array (FPGA) technologies enabled the implementation of customizable computing platforms using System-on-a-Programmable-Chip (SOPC), where we can
configure hardware resources appropriately to match specific application needs. In this paper, a new system design concept and a system design flow are proposed for SOPC paradigm. We describe our design and implementation of an embedded system on an SOPC development board, comparing different design methodologies and implementations using FIR application. Using the proposed design flow, the development cycle can be surprisingly short and the flexibility of SOPC can make us achieve the design specification effectively. |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38653 |
| Fulltext Rights: | 有償授權 |
| Appears in Collections: | 電機工程學系 |
Files in This Item:
| File | Size | Format | |
|---|---|---|---|
| ntu-94-1.pdf Restricted Access | 942.26 kB | Adobe PDF |
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