一個預測性服務質量機制控管的雙向通道晶片網路架構設計

Abstract

本文提出一個支援服務質量機制的特性並以預測方式增加效能的雙向通道晶片網路架構，它同時支援了不同服務品質的資料傳輸，使得晶片內部的傳輸效能有所改善。此雙向晶片網路架構允許特定服務品質的資料傳輸時能依其可預期的部份特性以達成傳輸方向預先轉變以及穿透路由器之設計。對於每一個晶片網路的路由器而言，資料通訊的延遲時間以及傳輸吞吐量都受到這個附加的通道靈活性影響而得到更好的效能。這篇論文呈現出一個創新的路由器架構設計以及一個改進控制雙向通道的機制。透過分析可以證明此架構的額外硬體成本是可忽略的。本文利用一個精準時脈週期的測試環境進行模擬，對於在假想的交通型態的傳輸情況下，此雙向通道晶片網路相對於傳統的單向通道架構都能展現出可觀的效能優勢。

A Bidirectional channel Network-on-Chip (BiNoC) architecture with previous direction request and pipeline bypass mechanism is proposed to enhance the performance of on-chip communication while supporting prioritized traffics in the network. The Anticipative QoS controlled BiNoC not only allows each communication channel to be dynamically self-configured to transmit flits in either direction in order to better utilize on-chip hardware resources but also enhances the latency performance by using penetration and observing previous direction request. This added flexibility promises better bandwidth utilization, lower packet delivery latency, and makes high priority packet be served with better guaranteed performance. In this Thesis, an improved bi-directional on-chip router architecture supporting the hybrid bypass mechanism is presented. It is shown that the associated hardware overhead is negligible. Cycle-accurate simulations run on this AQ-BiNoC network under synthetic traffics demonstrate consistent and significant performance advantage over the conventional mesh-grid BiNoC architecture.