自供電壓電獵能介面電路：透過同步反轉與多次電荷提取達成最大化功率增益及負載獨立性

Abstract

隨著物聯網 (IoT) 的迅速發展，為無線設備提供永續電力已成為一項關鍵挑戰，而壓電能量收集技術為此提供了一個極具潛力的解決方案。然而，其效能高度依賴於介面電路的設計。 本論文提出一種新穎的自供電同步反轉與多次電荷提取 (SIMCE) 介面電路，此電路結合了電感同步切換獵能 (SSHI) 架構的高功率增益以及同步電荷提取 (SECE) 架構的負載獨立特性。採用TSMC 0.18 μm HV-CMOS 製程實現，利用 12V 元件克服了標準 CMOS 製程低崩潰電壓所造成的功率增益限制。 本研究的核心之一，是深入分析了真實壓電元件的非理想性，這些損耗在高壓操作下會變得顯著，導致模擬與實測結果的巨大差異。為此，本論文建立了一個新的分析框架，引入「有效開路電壓」V_(OC,eff) 與「電路效能指標」(FoM_ckt)，藉此精確地將「介面電路的效能」與「壓電元件的內在損耗」進行解耦。 在使用Howland 電流源模擬壓電慣用模型，當開路電壓 (V_OC ) 為 2 V 時，SIMCE 電路可達到 88.91 µW 的輸出功率及相較於標準全橋整流器16.81倍的功率增益 (FoM)，而使用微機電壓電獵能器 (MEMS PEH) 進行量測時，儘管元件的非理想性使系統功率增益下降，但本研究所提出的「電路效能指標」(FoM_ckt) 仍高達 11.76，證明了 SIMCE 電路本身具備高轉換效率。本論文所提出的電路架構與分析框架，為未來高效能壓電獵能系統的設計與評估提供了關鍵基礎。

Amidst the rapid growth of the Internet of Things (IoT), sustainably powering wireless devices has become a critical challenge, for which piezoelectric energy harvesting emerges as a promising solution. However, its effectiveness is critically dependent on the interface circuit's design. This thesis proposes a novel self-powered Synchronous Inversion and Multi-shot Charge Extraction (SIMCE) interface circuit that combines the high-power gain of Synchronized Switch Harvesting on Inductor (SSHI) topologies with the load independence of Synchronous Electric Charge Extraction (SECE) architectures. The proposed SIMCE circuit is implemented in a TSMC 0.18 µm HV-CMOS process, utilizing 12V high-voltage devices to overcome the power gain limitations of standard CMOS. A core contribution of this work is the in-depth analysis of non-idealities in real-world Piezoelectric Energy Harvester (PEH) devices, such as dielectric loss, which become dominant at high operating voltages and cause significant discrepancies between simulation and measurement. To address this, this thesis establishes a new analytical framework that introduces an "effective open-circuit voltage" (V_(OC,eff)) and a "circuit Figure of Merit" (FoM_ckt) to accurately decouple the interface circuit's performance from the harvester's intrinsic losses. Measurement results from the fabricated chip validate this framework. When tested with a conventional PEH model (Howland current source), the SIMCE circuit achieves 88.91 μW of output power and a system power gain (FoM) of 16.81 at V_OC=2V. Crucially, when connected to a MEMS PEH, the proposed circuit Figure of Merit (FoM_ckt) remained high at 11.76, even as the overall system FoM was reduced by harvester non-idealities. This demonstrates the high intrinsic efficiency of the SIMCE circuit. The proposed architecture and analysis framework provide a critical foundation for the design and evaluation of future high-performance PEH systems.