V頻段主動倍頻器與微波功率放大器效率與線性度改良及滯後現象之研究

Abstract

本論文分成兩大部分，第一部分是是倍頻器的設計，將呈現兩個輸出於60 兆赫茲的倍頻器：第一個倍頻器為製作於0.25 微米矽鍺製程上的四倍頻器，採較傳統的設計方法，目的為介紹倍頻器的特性與其操作條件(偏壓、輸入功率)的關係；第二個倍頻器為製作於0.15 微米砷化鎵製程上的三倍頻器，此倍頻器的基頻與三倍頻輸出阻抗皆經設計使其在三倍頻輸出外也能有基頻功率輸出，此基頻功率可用於進一步提昇此三倍頻器的表現。 本論文第二部分是功率放大器的相關研究，首先將呈現兩個K頻段功率放大器，實現於台積電0.18 微米金氧半場效電晶體製程。這兩個電路的設計目的是實現適應偏壓技術，以提昇放大器輸出較小功率時的功率附加效率。第一個電路採二級共源級架構，透過其輸出端的耦合器，小部分的輸出功率將被耦合至一功率感測器，其轉換之直流電壓隨著輸出功率而改變，藉以控制放大器的閘極偏壓與汲極電流；第二個電路採二級疊接電晶體架構，其兩級閘級各並聯一個功率感測器以偵測射頻路徑上的功率強度，並將偵測到的功率轉換為控制閘級的直流電壓，藉以控制放大器的汲極電流。此二電路為適應偏壓技術首次運用在接近毫米波頻段的功率放大器上。 在改善效率之外，本論文另外提出一種全新的功率放大器線性化技術，其目的為消去功率放大器輸出的三階項雜訊。不似傳統的前饋控制架構，本電路只需要使用一個功率耦合器即可擷取出輔助的三階交叉調變訊號；另外，相較於使用另一非線性元件來產生輔助三階交叉調變訊號的傳統方法，本電路直接耦合電晶體反射的訊號，故不需要使用其他的非線性元件。作者將此概念實現在一個二十五兆赫茲的砷化鎵功率放大器上，當線性器打開時，只需增加10% (50 毫瓦)的直 流功耗，即可將OIP3 從25 dBm 提升至 39 dBm；若我們要求輸出一階項訊號必須比三階項雜訊大40 dB，則線性器開啟時輸出功率可由5 dBm 提升至14 dBm。 最後，本論文探討一個10 兆赫茲功率放大器在調整直流偏壓與操作功率時產生的滯後現象。這種現象從未被揭露與分析，肇因於閘極偏壓電阻與閘極電流耦合可同時產生多組直流解，包含穩定與不穩定的解。當功率放大器的操作變數(偏壓、輸入功率)改變時，原本的穩定解可能會變成不穩定，使系統的穩定解(量測值)產生不連續，產生滯後現象。本文提出嚴謹的分析方法，並提出閘極偏壓電阻設計值的上限。根據此偏壓電阻上限，我們重新設計了一個功率放大器，完全消除在第一個電路中所觀察到的滯後現象。

This thesis consists of two main parts, the first part is the design of two V-band frequency multipliers, and the second part is the related topics of microwave power amplifiers, including two K-band adaptive-bias power amplifiers with enhancement in back-off efficiency, a novel method for power amplifier linearization, and the discovery and analysis of hysteresis phenomena in PA operation. In the first part, the author presents a 52-75 GHz frequency quadrupler in 0.25-μm SiGe HBT and a 60-GHz frequency tripler in 0.15-μm pHEMT. The quadrupler features a wideband performance and introduces the corresponding changes in performance when the operated condition of the quadrupler changes. As for the tripler, the author revised the conventional structure of active frequency tripler by proposing two novel ideas. The first is to explore the harmonic load tuning with resistance load, and the second is to exploit the produced fundamental power at the drain of the FET in order to improve the performances of the tripler. The second part starts by presenting two K-band PAs, both fabricated in TSMC 0.18-μm CMOS, with adaptive bias technique that saves dc power when the PAs are operated with lower power levels. Although both the circuits involve the implement of a detector, the adaptive bias mechanisms in the two designs are realized by different methods, and the topologies of the two PAs are also different: the first one is a two-stage common-source amplifier and the second one is a two-stage cascode amplifier. Besides the introduction of the two PAs with their individual design methods and measured data, a brief comparison between the two works is also provided. Successively, the author proposes a novel method to generate an auxiliary third-order intermodulaion (IM3) signal, which can be used in power amplifier linearization by canceling the output IM3 power. This auxiliary signal is not obtained by conventional methods as driving a highly nonlinear device or subtracting the fundamental power from the output signal, but is simply achieved by exploiting the input reflected power of the main device. It is demonstrated that substantial IM3 power can be reflected to the source with little reflected fundamental power under some matching conditions of the device, and this feature can be utilized in the design of MMICs targeting excellent output IM3 cancellation with a simple structure. A 25-GHz PHEMT power amplifier is designed and fabricated to exemplify the proposed technique with outstanding linearity. The OIP3 of the proposed PA increases 14 dB from 25 to 39 dBm, and the output power enhances significantly from 5 to 14 dBm with －40-dB IM3 distortion (IMD3). The second part ends with the analysis of an X-band pHEMT PA with dc and RF hysteresis. The unusual phenomena can be attributed to the gate current resulted from the impact ionization coupling with the gate bias resistor, which is usually observed in the design of RF circuits to provide the gate bias. After the gate current is considered, two methods are proposed to analyze the hysteresis with the same conclusion. The cause of the encountered hysteresis is for the first time identified, and criteria for the selection of the gate bias resistor in order to avoid the hysteresis are proposed. Finally, a power amplifier complying with these criteria is presented with good performances and without hysteresis.