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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93246
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor胡振國zh_TW
dc.contributor.advisorJenn-Gwo Hwuen
dc.contributor.author黃崧瑋zh_TW
dc.contributor.authorSung-Wei Huangen
dc.date.accessioned2024-07-23T16:29:10Z-
dc.date.available2024-07-24-
dc.date.copyright2024-07-23-
dc.date.issued2024-
dc.date.submitted2024-07-10-
dc.identifier.citation[1] Chris Miller. Chip war: the fight for the world’s most critical technology. Simon and Schuster, 2022.
[2] Gordon E Moore, “Cramming more components onto integrated circuits,” Proceedings of the IEEE 86 (1): 82–85, 1998, doi:10.1109/JPROC.1998.658762.
[3] Gordon E Moore, “Cramming more components onto integrated circuits, Reprinted from Electronics, volume 38, number 8, April 19, 1965, pp. 114 ff.,” IEEE solid-state circuits society newsletter 11 (3): 33–35, 2006, doi:10.1109/NSSC.2006.4785860.
[4] X. Gu, T.-L. Chen, G. Gildenblat, G.O. Workman, S. Veeraraghavan, S. Shapira, & K. Stiles, “A surface potential-based compact model of n-MOSFET gate tunneling current,” IEEE Trans. Electron Devices 51 (1): 127–135, 2004, doi:10.1109/TED.2003.820652.
[5] S.-H. Lo, D.A. Buchanan, Y. Taur, & W. Wang, “Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET’s,”IEEE Electron Device Lett. 18 (5): 209–211, 1997, doi:10.1109/55.568766.
[6] K.F. Schuegraf, Donggun Park, & Chenming Hu. “Reliability of thin SiO2 at directtunneling voltages,” in Proceedings of 1994 IEEE International Electron Devices Meeting, pages 609–612, 1994, doi:10.1109/IEDM.1994.383336.
[7] Kuo-Nan Yang, Huan-Tsung Huang, Ming-Chin Chang, Che-Min Chu, Yuh-Shu Chen, Ming-Jer Chen, Yeou-Ming Lin, Mo-Chiun Yu, S.M. Jang, C.H. Yu, & M.S. Liang, “A Physical Model for Hole Direct Tunneling Current in p+ Poly-Gate pMOSFETs with Ultrathin Gate Oxides,” IEEE Trans. Electron Devices 47 (11):2161–2166, 2000, doi:10.1109/16.877179.
[8] Wen-Chin Lee & Chenming Hu, “Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction-and valence-band electron and hole tunneling,”IEEE Transactions on Electron Devices 48 (7): 1366–1373, 2001, doi:10.1109/16.930653.
[9] C.W. Liu, W.T. Liu, M.H. Lee, W.S. Kuo, & B.C. Hsu, “A novel photodetector using MOS tunneling structures,” IEEE Electron Device Lett. 21 (6): 307–309, 2000, doi:10.1109/55.843159.
[10] Yen-Kai Lin & Jenn-Gwo Hwu, “Photosensing by Edge Schottky Barrier Height Modulation Induced by Lateral Diffusion Current in MOS(p) Photodiode,” IEEE Trans. Electron Devices 61 (9): 3217–3222, 2014, doi:10.1109/TED.2014.2334704.
[11] Ming-Han Yang & Jenn-Gwo Hwu, “Influence of neighboring coupling on metalinsulator-semiconductor (MIS) deep-depletion tunneling current via Schottky barrier height modulation mechanism,” J. Appl. Phys. 121 (15): 154504, 2017, doi:10.1063/1.4981891.
[12] R Marnadu, J Chandrasekaran, S Maruthamuthu, V Balasubramani, P Vivek, & R Suresh, “Ultra-high photoresponse with superiorly sensitive metal-insulatorsemiconductor (MIS) structured diodes for UV photodetector application,” Applied Surface Science 480: 308–322, 2019, doi:10.1016/j.apsusc.2019.02.214.
[13] MA Kinch, “Metal-insulator-semiconductor infrared detectors,” Semiconductors and semimetals 18: 313–378, 1981, doi:10.1016/S0080-8784(08)62767-2.
[14] Joonho Bae, Hyunjin Kim, Xiao-Mei Zhang, Cuong H Dang, Yue Zhang, Young Jin Choi, Arto Nurmikko, & Zhong Lin Wang, “Si nanowire metal–insulator–semiconductor photodetectors as efficient light harvesters,” Nanotechnology 21 (9):095502, 2010, doi:10.1088/0957-4484/21/9/095502.
[15] Aniello Pelella, Daniele Capista, Maurizio Passacantando, Enver Faella, Alessandro Grillo, Filippo Giubileo, Nadia Martucciello, & Antonio Di Bartolomeo, “A Self-Powered CNT–Si Photodetector with Tuneable Photocurrent,” Advanced Electronic Materials 9 (1): 2200919, 2023, doi:10.1002/aelm.202200919.
[16] Yu-Cin Lin & Jenn-Gwo Hwu, “Current Polarity Changeable Concentric MIS Tunnel Photodiode With Linear Photodetectivity via Inner Gate Biasing and Outer Ring Short-Circuit Operation,” IEEE Transactions on Electron Devices2023, doi:10.1109/TED.2023.3306320.
[17] Chu-Hsuan Lin & Chee Wee Liu, “Metal-insulator-semiconductor photodetectors,”Sensors 10 (10): 8797–8826, 2010, doi:10.3390/s101008797.
[18] Chang-Feng Yang & Jenn-Gwo Hwu, “Light-to-dark current ratio enhancement on MIS tunnel diode ambient light sensor by oxide local thinning mechanism and near power-free neighboring gate,” IEEE Transactions on Electron Devices 65 (5): 1810–1816, 2018, doi:10.1109/TED.2018.2818187.
[19] PK Chang & JG Hwu, “Investigation of interface property in Al/SiO2/n-SiC structure with thin gate oxide by illumination,” Applied Physics A 123 (4): 261, 2017, doi:10.1007/s00339-017-0897-2.
[20] Yen-Hao Shih & Jenn-Gwo Hwu, “An on-chip temperature sensor by utilizing a MOS tunneling diode,” IEEE Electron Device Lett. 22 (6): 299–301, 2001, doi:10.1109/55.924848.
[21] A Dere, A TataroŸğlu, Abdullah G Al-Sehemi, Haydar Eren, M Soylu,Ahmed A Al-Ghamdi, & F Yakuphanoglu, “A temperature sensor based on Al/p-Si/CuCdO2/Al diode for low temperature applications,” Journal of Electronic Materials 49 (4): 2317–2325, 2020, doi:10.1007/s11664-020-07989-z.
[22] Yen-Kai Lin & Jenn-Gwo Hwu, “Role of lateral diffusion current in perimeterdependent current of MOS (p) tunneling temperature sensors,” IEEE Transactions on Electron Devices 61 (10): 3562–3565, 2014, doi:10.1109/TED.2014.2346238.
[23] Yen-Hao Shih, Shian-Ru Lin, Tsung-Miau Wang, & Jenn-Gwo Hwu, “High sensitive and wide detecting range MOS tunneling temperature sensors for on-chip temperature detection,” IEEE Transactions on Electron Devices 51 (9): 1514–1521, 2004, doi:10.1109/TED.2004.833571.
[24] Hayriye Gökçen Çetinkaya, Osman Çiçek, Şemsettin Altındal, Yosef Badali, & Selçuk Demirezen, “Vertical CdTe: PVP/p-Si-Based Temperature Sensor by Using Aluminum Anode Schottky Contact,” IEEE Sensors Journal 22 (23): 22391–22397, 2022, doi:10.1109/JSEN.2022.3212867.
[25] Chien-Chih Lin & Jenn-Gwo Hwu, “Performance enhancement of metal-oxidesemiconductor tunneling temperature sensors with nanoscale oxides by employing ultrathin Al 2 O 3 high-k dielectrics,” Nanoscale 5 (17): 8090–8097, 2013,doi:10.1039/C3NR02360E.
[26] Ömer Güllü & Abdülmecit Türüt, “Electronic properties of Al/DNA/p-Si MIS diode: Application as temperature sensor,” Journal of Alloys and Compounds 509 (3): 571–577, 2011, doi:10.1016/j.jallcom.2010.09.146.
[27] Li Zhu & Shamus McNamara, “Low Power Tunneling Current Strain Sensor Using MOS Capacitors,” J Microelectromech Syst 24 (3): 755–762, 2015, doi:10.1109/JMEMS.2014.2351778.
[28] RP Strittmatter, RA Beach, GS Picus, & TC McGill, “Piezoelectrically enhanced capacitive strain sensors using GaN metal-insulator-semiconductor diodes,” Journal of applied physics 94 (9): 5958–5963, 2003, doi:10.1063/1.1611267.
[29] Min Miao, Qifang Hu, Yilong Hao, Haifeng Dong, Ling Wang, Yunbo Shi, & Sanmin Shen. “A bulk micromachined Si-on-glass tunneling accelerometer with out-of-plane sensing capability,” in 2007 2nd IEEE International Conference on Nano/Micro Engineered and Molecular Systems, pages 235–240. IEEE, 2007,doi:10.1109/NEMS.2007.352270.
[30] Gang Chen, Jerry Yu, & PT Lai, “A study on MIS Schottky diode based hydrogen sensor using La2O3 as gate insulator,” Microelectronics Reliability 52 (8): 1660–1664, 2012, doi:10.1016/j.microrel.2012.03.022.
[31] Paul F Ruths, S Ashok, Stephen J Fonash, & Joel M Ruths, “A study of Pd/Si MIS Schottky barrier diode hydrogen detector,” IEEE Transactions on Electron Devices 28 (9): 1003–1009, 1981, doi:10.1109/T-ED.1981.20475.
[32] Shinji Nakagomi, A Lloyd Spetz, I Lundstrom, & Peter Tobias, “Electrical characterization of carbon monoxide sensitive high temperature sensor diode based on catalytic metal gate-insulator-silicon carbide structure,” IEEE sensors journal 2 (5):379–386, 2002, doi:10.1109/JSEN.2002.805036.
[33] Tsung-Han Tsai, Jun-Rui Huang, Kun-Wei Lin, Wei-Chou Hsu, Huey-Ing Chen, & Wen-Chau Liu, “Improved hydrogen sensing characteristics of a Pt/SiO2/GaN Schottky diode,” Sensors and Actuators B: Chemical 129 (1): 292–302, 2008, doi:10.1016/j.snb.2007.08.028.
[34] Koushik Dutta, Nabaneeta Banerjee, Himakshi Mishra, & Partha Bhattacharyya, “Performance improvement of Pd/ZnO-NR/Si MIS gas sensor device in capacitive mode: Correlation with equivalent-circuit elements,” IEEE Transactions on Electron Devices 63 (3): 1266–1273, 2016, doi:10.1109/TED.2016.2520020.
[35] Ryan Hood, Robert D Kolasinski, Brian Zutter, Raymond W Friddle, Joshua D Sugar, Norman C Bartelt, Scott Habermehl, Josh A Whaley, & A Alec Talin, “Patterned Adhesion Layer Enables Rugged Pd-MIS Hydrogen Sensors,” ACS Applied Materials & Interfaces 15 (35): 41598–41605, 2023, doi:10.1021/acsami.3c04823.
[36] Jheng-Tai Yan & Ching-Ting Lee, “Improved detection sensitivity of Pt/𝛽-Ga2O3/GaN hydrogen sensor diode,” Sensors and Actuators B: Chemical 143 (1):192–197, 2009, doi:10.1016/j.snb.2009.08.040.
[37] Rudolf Hezel, “Recent progress in MIS solar cells,” Progress in Photovoltaics:Research and Applications 5 (2): 109–120, 1997, doi:10.1002/(SICI)1099-159X(199703/04)5:2<109::AID-PIP160>3.0.CO;2-8.
[38] J. Shewchun, D. Burk, & M.B. Spitzer, “MIS and SIS solar cells,” IEEE Transactions on Electron Devices 27 (4): 705–716, 1980, doi:10.1109/T-ED.1980.19926.
[39] Rotem Har-Lavan & David Cahen, “40 Years of Inversion Layer Solar Cells: From MOS to Conducting Polymer/Inorganic Hybrids,” IEEE J. Photovolt. 3 (4): 1443–1459, 2013, doi:10.1109/JPHOTOV.2013.2270347.
[40] David L Pulfrey, “MIS solar cells: A review,” IEEE Transactions on Electron Devices 25 (11): 1308–1317, 1978, doi:10.1109/T-ED.1978.19271.
[41] Rehab Ramadan & Raúl J Martín-Palma, “Electrical characterization of MIS Schottky barrier diodes based on nanostructured porous silicon and silver nanoparticles with applications in solar cells,” Energies 13 (9): 2165, 2020, doi:10.3390/en13092165.
[42] Mansour Aouassa, Mohammed Bouabdellaoui, Makrem Yahyaoui, Tarak Kallel, Thouraya Ettaghzouti, Saud A Algarni, & Ibrahim O Althobaiti, “Mn-Doped Ge Nanoparticles Grown on SiO2 Thin Films by Molecular Beam Epitaxy for Photodetector and Solar Cell Applications,” ACS Applied Electronic Materials 5 (5): 2696–2703, 2023, doi:10.1021/acsaelm.3c00162.
[43] Daming Chen, Yifeng Chen, Zigang Wang, Jian Gong, Chengfa Liu, Yang Zou, Yu He, Yao Wang, Ling Yuan, Wenjie Lin, et al., “24.58% total area efficiency of screen-printed, large area industrial silicon solar cells with the tunnel oxide passivated contacts (i-TOPCon) design,” Solar Energy Materials and Solar Cells 206: 110258, 2020, doi:10.1016/j.solener.2023.112205.
[44] Zhao-bin Liu, Zhi-wei Li, Chun-lin Guo, Ya Liu, Hao-ping Peng, Jianhua Wang, & Xu-ping Su, “Effect of firing process on electrical properties and efficiency of n-TOPCon solar cells,” Solar Energy 267: 112205, 2024, doi:10.1016/j.solener.2023.112205.
[45] Chien-Shun Liao & Jenn-Gwo Hwu, “Subthreshold Swing Reduction by Double Exponential Control Mechanism in an MOS Gated-MIS Tunnel Transistor,” IEEE Trans. Electron Devices 62 (6): 2061–2065, 2015, doi:10.1109/TED.2015.2424245.
[46] Chang-Feng Yang, Bo-Jyun Chen, Wei-Chen Chen, Kuan-Wun Lin, & Jenn-Gwo Hwu, “Gate oxide local thinning mechanism-induced sub-60 mV/decade subthreshold swing on charge-coupled MIS (p) tunnel transistor,” IEEE Transactions on Electron Devices 66 (1): 279–285, 2018, doi:10.1109/TED.2018.2879654.
[47] Chian-Hsiu Chan & Jenn-Gwo Hwu, “On/Off Current Ratio Enhancement by Reducing Electrode Separation in Gate-Controlled MIS Tunnel Transistor,” ECS Transactions 85 (8): 65, 2018, doi:10.1149/08508.0065ecst.
[48] Bogdan Majkusiak, “Experimental and theoretical study of the current-voltage characteristics of the MISIM tunnel transistor,” IEEE Transactions on Electron Devices 45 (9): 1903–1911, 1998, doi:10.1109/16.711354.
[49] Tzu-Hao Chiang & Jenn-Gwo Hwu, “Ultra-low subthreshold swing in gated MIS (p) tunnel diodes with engineered oxide local thinning layers,” IEEE Transactions on Electron Devices 67 (4): 1887–1893, 2020, doi:10.1109/TED.2020.2976119.
[50] Wei-Chih Kao, Jun-Yao Chen, & Jenn-Gwo Hwu, “Transconductance sensitivity enhancement in gated-MIS (p) tunnel diode by self-protective effective local thinning mechanism,” Applied Physics Letters 109 (6), 2016, doi:10.1063/1.4960799.
[51] Jen Hao Chen, Kung Chu Chen, & Jenn Gwo Hwu, “Energy-Saving Logic Gates Utilizing Coupling Phenomenon Between MIS (p) Tunneling Diodes,” IEEE Transactions on Electron Devices 68 (12): 6558–6562, 2021, doi:10.1109/TED.2021.3122414.
[52] Chien-Shun Liao & Jenn-Gwo Hwu, “Remote gate-controlled negative transconductance in gated MIS tunnel diode,” IEEE Transactions on Electron Devices 63 (7): 2864–2870, 2016, doi:10.1109/TED.2016.2565688.
[53] Chien-Shun Liao & Jenn-Gwo Hwu, “Negative gate transconductance in MIS tunnel diode induced by peripheral minority carrier control mechanism,” ECS Transactions 69 (5): 229, 2015, doi:10.1149/06905.0229ecst.
[54] Chang-Feng Yang & Jenn-Gwo Hwu, “Tunable negative differential resistance in MISIM tunnel diodes structure with concentric circular electrodes controlled by designed substrate bias,” IEEE Transactions on Electron Devices 64 (12): 5230–5235, 2017, doi:10.1109/TED.2017.2757506.
[55] Chang-Feng Yang & Jenn-Gwo Hwu, “Double Negative Differential ResistanceProperties in MISIM Structure with Substrate Grounded and Two Electrode TerminalsBiased with Constant Offset Voltage,” ECS Transactions 80 (1): 81, 2017,doi:10.1149/08001.0081ecst.
[56] Chien-Shun Liao, Wei-Chih Kao, & Jenn-Gwo Hwu, “Energy-saving write/readoperation of memory cell by using separated storage device and remote readingwith an MIS tunnel diode sensor,” IEEE Journal of the Electron Devices Society 4(6): 424–429, 2016, doi:10.1109/JEDS.2016.2591956.
[57] Tzu-Yu Chen & Jenn-Gwo Hwu, “Two states phenomenon in the current behaviorof metal-oxide-semiconductor capacitor structure with ultra-thin SiO2,” Appl. Phys.Lett. 101 (7): 073506, 2012, doi:10.1063/1.4746284.
[58] Jun-Yao Chen, Wei-Chih Kao, & Jenn-Gwo Hwu, “Enhanced saturation currentsensitivities to charge trapping and illumination in MOS tunnel diode by insertingmetal in gate dielectric,” Applied Physics A 122: 1–7, 2016, doi:10.1007/s00339-016-0092-x.
[59] Hao-Jyun Li, Chang-Feng Yang, & Jenn-Gwo Hwu, “Two Capacitance StatesMemory Characteristic in Metal–Oxide–Semiconductor Structure Controlled by anOuter MOS-Gate Ring,” IEEE Transactions on Electron Devices 66 (3): 1249–1254, 2019, doi:10.1109/TED.2018.2889521.
[60] Wei-Chen Chen, Chang-Feng Yang, & Jenn-Gwo Hwu, “Enhanced two states currentin MOS-gated MIS separate write/read storage device by oxide soft break-down in remote gate,” IEEE Transactions on Nanotechnology 18: 62–67, 2018,doi:10.1109/TNANO.2018.2880277.
[61] Bo-Jyun Chen & Jenn-Gwo Hwu, “Edge-Etched Al 2 O 3 Dielectric as Charge StorageRegion in a Coupled MIS Tunnel Diode Sensor,” IEEE Journal of the ElectronDevices Society 8: 825–833, 2020, doi:10.1109/JEDS.2020.3011996.
[62] Soo-Young Oh, Donald E Ward, & Robert W Dutton, “Transient analysis ofMOS transistors,” IEEE Journal of Solid-State Circuits 15 (4): 636–643, 1980,doi:10.1109/JSSC.1980.1051448.
[63] D Bauza & G Ghibaudo, “MOSFET parameter extraction from static, dynamic andtransient current measurements,” Microelectronics journal 25 (1): 41–61, 1994,doi:10.1016/0026-2692(94)90158-9.
[64] Chih-Tang Sah & Horng-Sen Fu, “Transient response of MOS capacitors underlocalized photoexcitation,” IEEE Transactions on Electron Devices 21 (3): 202–209, 1974, doi:10.1109/T-ED.1974.17897.
[65] CT Sah & HS Fu, “Current and capacitance transient responses of MOS capacitor. I.General theory and applications to initially depleted surface without surface states,”physica status solidi (a) 11 (1): 297–310, 1972, doi:10.1002/pssa.2210110131.
[66] TW Collins & JN Churchill, “Exact modeling of the transient response of anMOS capacitor,” IEEE Transactions on Electron Devices 22 (3): 90–101, 1975,doi:10.1109/T-ED.1975.18086.
[67] Sung-Wei Huang & Jenn-Gwo Hwu. “Saturation of Transient Current Readat Millisecond-Scale in MOS Capacitor with Ultra-Thin Oxide when Switching,”in 2023 International VLSI Symposium on Technology, Systems and Applications(VLSI-TSA/VLSI-DAT), pages 1–2, 2023, doi:10.1109/VLSI-TSA/VLSIDAT57221.2023.10134352.
[68] Sung-Wei Huang & Jenn-Gwo Hwu, “Analytical Modeling of the Temporal Responseof the Transient Displacement Currents in MIS Tunnel Diodes UnderLow-Voltage Operation,” IEEE Transactions on Electron Devicespages 1–7, 2024,doi:10.1109/TED.2023.3341888.
[69] S-Y Lee & Dieter K Schroder, “Measurement time reduction for generationlifetimes,” IEEE Transactions on Electron Devices 46 (5): 1016–1021, 1999,doi:10.1109/16.760411.
[70] F.P. Heiman, “On the Determination of Minority Carrier Lifetime From the TransientResponse of an MOS Capacitor,” IEEE Trans. Electron Devices 14 (11): 781–784, 1967, doi:10.1109/T-ED.1967.16107.
[71] Hamid Amini Moghadam, Sima Dimitrijev, Jisheng Han, Daniel Haasmann,& Amirhossein Aminbeidokhti, “Transient-current method for measurementof active near-interface oxide traps in 4H-SiC MOS capacitors and MOSFETs,”IEEE Transactions on Electron Devices 62 (8): 2670–2674, 2015,doi:10.1109/TED.2015.2440444.
[72] Shan Jiang, Meng Zhang, Xianwei Meng, Xiang Zheng, Shiwei Feng, & YaminZhang, “Trap Characterization of Trench-Gate SiC MOSFETs Based on Transient218doi:10.6342/NTU202401597Drain Current,” IEEE Transactions on Power Electronics 38 (5): 6555–6565, 2023,doi:10.1109/TPEL.2023.3242950.
[73] Pyungho Choi, Sangmin Lee, Hyojung Kim, Jungmin Park, & Byoungdeog Choi,“Evaluation of Minority Carrier Generation Lifetime for Oxide Semiconductors,”Thin Solid Films 704: 138023, 2020, doi:10.1016/j.tsf.2020.138023.
[74] JG Simmons & LS Wei, “Theory of transient emission current in MOS devices andthe direct determination interface trap parameters,” Solid-State Electronics 17 (2):117–124, 1974, doi:10.1016/0038-1101(74)90059-8.
[75] Jichel Bea, Kangwook Lee, Takafumi Fukushima, Tetsu Tanaka, & Mitsumasa Koyanagi,“Evaluation of Cu contamination at backside surface of thinned wafer in 3-Dintegration by transient-capacitance measurement,” IEEE Electron Device Letters32 (1): 66–68, 2010.
[76] KW Lee, JC Bea, Takafumi Fukushima, Tetsu Tanaka, & Mitsumasa Koyanagi,“Electrical evaluation of Cu contamination behavior at the backside surface of athinned wafer by transient capacitance measurement,” Semiconductor Science andTechnology 26 (2): 025007, 2010, doi:10.1088/0268-1242/26/2/025007.
[77] Jichel Bea, Kangwook Lee, Takafumi Fukushima, Tetsu Tanaka, & Mitsumasa Koyanagi,“Evaluation of Cu diffusion from Cu through-silicon via (TSV) in threedimensionalLSI by transient capacitance measurement,” IEEE Electron DeviceLetters 32 (7): 940–942, 2011, doi:10.1109/LED.2011.2141109.
[78] Yu-De Tan & Jenn-Gwo Hwu, “2-State current characteristics of MOSCAP withultrathin oxide and metal gate,” ECS Solid State Letters 4 (12): N23, 2015,doi:10.1149/2.0111512ssl.
[79] Kuan-Hao Tseng, Chien-Shun Liao, & Jenn-Gwo Hwu, “Enhancement of transienttwo-states characteristics in metal-insulator-semiconductor structure by thinningmetal thickness,” IEEE Transactions on Nanotechnology 16 (6): 1011–1015, 2017,doi:10.1109/TNANO.2017.2740943.
[80] Chieh-Fang Cheng, Yung-Chun Yang, & Jenn-Gwo Hwu, “Effect of oxide thicknesson the two-state characteristics in MIS (p) tunnel diode with ultrathin metalsurrounded gate,” ECS Journal of Solid State Science and Technology 8 (12): N214,2019, doi:10.1149/2.0191912jss.
[81] Yung-Chun Yang, Kuan-Wun Lin, & Jenn-Gwo Hwu, “Transient two-state characteristicsin MIS (p) tunnel diode with edge-thickened oxide (ETO) structure,”ECS Journal of Solid State Science and Technology 9 (10): 103006, 2020,doi:10.1149/2162-8777/abc576.
[82] Jian-Yu Lin & Jenn-Gwo Hwu, “Enhanced Transient Behavior in MIS(p) TunnelDiodes by Trench Forming at the Gate Edge,” IEEE Transactions on Electron Devices68 (9): 4189–4194, 2021, doi:10.1109/TED.2021.3095052.
[83] Hsuan-Yi Lin & Jenn-Gwo Hwu, “Enhancement of Transient Current in MIS (p)Tunneling Diode with Reduced Reversed Bias Current by Oxide Removal at theGate Edge,” ECS Transactions 111 (1): 229, 2023, doi:10.1149/11101.0229ecst.
[84] Sung-Wei Huang & Jenn-Gwo Hwu, “Transient Current Enhancement in MISTunnel Diodes With Lateral Electric Field Induced by Designed High-Low OxideLayers,” IEEE Transactions on Electron Devices 68 (12): 6580–6585, 2021,doi:10.1109/TED.2021.3122814.
[85] Sung-Wei Huang & Jenn-Gwo Hwu, “Capacitance Analysis of Transient BehaviorImproved Metal-Insulator-Semiconductor Tunnel Diodes With Ultra Thin MetalSurrounded Gate,” IEEE Journal of the Electron Devices Society 9: 1041–1048,2021, doi:10.1109/JEDS.2021.3123332.
[86] Sung-Wei Huang & Jenn-Gwo Hwu, “Role of Proportion of Surrounding Gateon the Improved Transient Behavior of MIS Tunnel Diode with Ultra-ThinMetal Surrounded Gate (UTMSG),” ECS Transactions 111 (1): 93, 2023,doi:10.1149/11101.0093ecst.
[87] Sung-Wei Huang & Jenn-Gwo Hwu, “Improved Two States Characteristics inMIS Tunnel Diodes by Oxide Local Thinning Enhanced Transient Current Behavior,”IEEE Transactions on Electron Devices 69 (12): 7107–7112, 2022,doi:10.1109/TED.2022.3215103.
[88] Sung-Wei Huang & Jenn-Gwo Hwu, “Study and Optimization of Two-StateTransient Currents at Millisecond Time Scales in MIS Tunnel Diodes,”IEEE Transactions on Electron Devices 70 (10): 4999–5006, 2023,doi:10.1109/TED.2023.3304282.
[89] Y. Taur & T. H. Ning. Fundamentals of Modern VLSI Devices, 3rd ed. CambridgeUniversity Press, Cambridge, 2022.
[90] D. A. Neamen. Semiconductor Physics and Devices: Basic Principles, 4th ed. Mc-Graw Hill, Singapore, 2012.
[91] E. H. Nicollian & J. R. Brews. MOS (Metal Oxide Semiconductor) Physics andTechnology. John Wiley & Sons, 1982.
[92] M. A. Green, F. D. King, & J. Shewchun, “Minority Carrier MIS Tunnel Diodes andTheir Application to Electron- and Photo-Voltaic Energy Conversion—I. Theory,”Solid State Electron 17 (6): 551–561, 1974, doi:10.1016/0038-1101(74)90172-5.
[93] J. Shewchun, M. A. Green, & F. D. King, “Minority Carrier MIS Tunnel Diodesand Their Application to Electron- and Photo-Voltaic Energy Conversion—II.Experiment,” Solid State Electron 17 (6): 563–572, 1974, doi:10.1016/0038-1101(74)90173-7.
[94] M.A. Green & J. Shewchun, “Capacitance properties of MIS tunnel diodes,” J. Appl.Phys. 46 (12): 5185–5190, 1975, doi:10.1063/1.321583.
[95] Kung-Chu Chen, Kuan-Wun Lin, Sung-Wei Huang, Jian-Yu Lin, & Jenn-Gwo Hwu,“Comprehensive Study of Inversion Capacitance in Metal-Insulator-SemiconductorCapacitor With Existing Oxide Charges,” IEEE J. Electron Devices Soc. 10: 960–969, 2022, doi:10.1109/JEDS.2022.3215771.
[96] Kuan-Wun Lin, Kung-Chu Chen, & Jenn-Gwo Hwu, “An Analytical Modelfor the Electrostatics of Reverse-Biased Al/SiO2/Si(p) MOS Capacitors WithTunneling Oxide,” IEEE Trans. Electron Devices 69 (4): 1972–1978, 2022,doi:10.1109/TED.2022.3147747
[97] Kung-Chu Chen, Kuan-Wun Lin, & Jenn-Gwo Hwu, “Role of SchottkyBarrier Height Modulation on the Reverse Bias Current Behaviorof MIS(p) Tunnel Diodes,” IEEE Access 9: 163929–163937, 2021,doi:10.1109/ACCESS.2021.3133575.
[98] Charles Kittel. Introduction to solid state physics, 9th ed. John Wiley & Sons, NewJersey, 2018.
[99] S.M. Sze & Kwok K. Ng. Physics of Semiconductor Devices, 3rd ed. John Wiley& Sons, New York, 2006.
[100] CT Sah & HS Fu, “Current and capacitance transient responses of MOS capacitor.II. Recombination centers in the surface space charge layer,” physica status solidi(a) 14 (1): 59–70, 1972, doi:10.1002/pssa.2210140105.
[101] T.W. Collins. “Exact modeling of time-dependent phenomena in an MOS structure,”in 1973 International Electron Devices Meeting, pages 342–345, 1973,doi:10.1109/IEDM.1973.188725.
[102] TW Collins, JN Churchill, FE Holmstrom, & A Moschwitzer. “Modeling of the Transient Response of an MIS Capacitor,” . In Advances in Electronics and Electron Physics, volume 47, pages 267–329. Elsevier, 1978.
[103] Yamada, Yugami, & Ohkura. “Charging And Intrinsic-leakage Current Peaks In Thin Silicon-dioxide Films,” in 1997 Symposium on VLSI Technology, pages 147– 148, 1997, doi:10.1109/VLSIT.1997.623741.
[104] R.-I. Yamada & J. Yugami. “Analysis of the exponentially decaying transient current in MOS capacitors,” in 2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320), pages 387–392, 2002, doi:10.1109/RELPHY.2002.996668.
[105] Werner Kern, “The Evolution of Silicon Wafer Cleaning Technology,” J. Electrochem. Soc. 137: 1887–1892, 1990, doi:10.1149/1.2086825.
[106] G. C. Jain, A. Prasad, & B. C. Chakravarty, “On the Mechanism of the Anodic Oxidation of Si at Constant Voltage,” J. Electrochem. Soc. 126: 89–92, 1979, doi:10.1149/1.2128996.
[107] Yen-Po Lin & Jenn-Gwo Hwu, “Suboxide characteristics in ultrathin oxides grown under novel oxidation processes,” Journal of Vacuum Science & Technology A 22 (6): 2265–2272, 2004, doi:10.1116/1.1795824.
[108] Chien-Shun Liao & Jenn-Gwo Hwu, “Current coupling effect in MIS tunnel diode with coupled open-gated MIS structure,” ECS Transactions 75 (5): 77, 2016, doi:10.1149/07505.0077ecst.
[109] C. B. Duke. Tunneling in Solids. Academic Press, New York, 1969.
[110] Peter J Price & John M Radcliffe, “Esaki tunneling,” IBM Journal of Research and Development 3 (4): 364–371, 1959, doi:10.1147/rd.34.0364.
[111] M Lenzlinger & EH Snow, “Fowler-Nordheim tunneling into thermally grown SiO2,” Journal of Applied physics 40 (1): 278–283, 1969.
[112] ”Atlas User’s Manual”, 2016. Accessed on: June 9, 2021. [Online]. Available: https://silvaco.com.
[113] Giuseppe Iannaccone, Gilberto Curatola, & Gianluca Fiori. Effective Bohm Quantum Potential for device simulators based on drift-diffusion and energy transport. Springer, 2004.
[114] W. Shockley & W. T. Read, “Statistics of the Recombinations of Holes and Electrons,”Phys. Rev. 87: 835–842, 1952, doi:10.1103/PhysRev.87.835.
[115] Re N Hall, “Electron-hole recombination in germanium,” Physical review 87 (2):387, 1952, doi:10.1103/physrev.87.387.
[116] J Dziewior & W Schmid, “Auger coefficients for highly doped and highly excited silicon,” Applied Physics Letters 31 (5): 346–348, 1977, doi:10.1063/1.89694.
[117] Chih-tang Sah, Robert N. Noyce, & William Shockley, “Carrier Generation and Recombination in P-N Junctions and P-N Junction Characteristics,” Proceedings ofthe IRE 45 (9): 1228–1243, 1957, doi:10.1109/JRPROC.1957.278528.
[118] Y. Tsividis & C. McAndrew. Operation and Modeling of the MOS Transistor. OxfordUniversity Press, Oxford, 2011.
[119] Chenming Hu. Modern semiconductor devices for integrated circuits, volume 2.Prentice Hall Upper Saddle River, NJ, 2010.
[120] Yu Fu, Te Bi, Yuhao Chang, Ruimin Xu, Yuehang Xu, & Hiroshi Kawarada,“Oxidized-Silicon-Terminated Diamond p-FETs With SiO2-Filling Shallow Trench Isolation Structures,” IEEE Electron Device Letters 44 (11): 1899–1902, 2023,doi:10.1109/LED.2023.3319574.
[121] P Ashburn, DV Morgan, & MJ Howes, “A theoretical and experimental study ofrecombination in silicon p- n junctions,” Solid-state electronics 18 (6): 569–577,1975, doi:10.1016/0038-1101(75)90035-0.
[122] R-I Yamada & Jiro Yugami. “Analysis of the exponentially decaying transientcurrent in MOS capacitors,” in 2002 IEEE International Reliability Physics Symposium.Proceedings. 40th Annual (Cat. No. 02CH37320), pages 387–392. IEEE,2002, doi:10.1109/RELPHY.2002.996668.
[123] S Manzini & A Modelli. “Tunneling discharge of trapped holes in silicon dioxide,”. In Insulating films on semiconductors, pages 112–115. Elsevier, 1983.
[124] Chia-De Lin & Jenn-Gwo Hwu, “Improved CV Hysteresis and Two-States Characteristicsin MIS (p) Structure with Elongated Thin Metal Gate,” ECS Transactions85 (6): 51, 2018, doi:10.1149/MA2018-01/22/1374.
[125] AF Mayadas & M Shatzkes, “Electrical-resistivity model for polycrystalline films:the case of arbitrary reflection at external surfaces,” Physical review B 1 (4): 1382,1970, doi:10.1103/PhysRevB.1.1382.
[126] Diego Chaverri, Alejandro Saenz, & Victor Castano, “Grain size and electrical resistivitymeasurements on aluminum polycrystalline thin films,” Materials Letters12 (5): 344–348, 1991, doi:10.1016/0167-577X(91)90114-L.
[127] Yuanyuan Shi, Xianhu Liang, Bin Yuan, Victoria Chen, Haitong Li, Fei Hui, Zhouchangwan Yu, Fang Yuan, Eric Pop, H-S Philip Wong, et al., “Electronic synapses made of layered two-dimensional materials,” Nature Electronics 1 (8):458–465, 2018, doi:10.1038/s41928-018-0118-9.
[128] Felix Palumbo, Chao Wen, Salvatore Lombardo, Sebastian Pazos, FernandoAguirre, Moshe Eizenberg, Fei Hui, & Mario Lanza, “A review on dielectric breakdown in thin dielectrics: silicon dioxide, high-k, and layered dielectrics,” AdvancedFunctional Materials 30 (18): 1900657, 2020, doi:10.1002/adfm.201900657.
[129] M. Depas, T. Nigam, & M.M. Heyns, “Soft breakdown of ultra-thin gate oxidelayers,” IEEE Transactions on Electron Devices 43 (9): 1499–1504, 1996,doi:10.1109/16.535341.
[130] Salvatore Lombardo, James H Stathis, Barry P Linder, Kin Leong Pey, FelixPalumbo, & Chih Hang Tung, “Dielectric breakdown mechanisms in gate oxides,”Journal of applied physics 98 (12), 2005, doi:10.1063/1.2147714.
[131] S Lombardo, A La Magna, I Crupi, C Gerardi, & Felice Crupi, “Reduction of thermaldamage in ultrathin gate oxides after intrinsic dielectric breakdown,” AppliedPhysics Letters 79 (10): 1522–1524, 2001, doi:10.1063/1.1400083.
[132] JW McPherson & HC Mogul, “Underlying physics of the thermochemical E modelin describing low-field time-dependent dielectric breakdown in SiO 2 thin films,”Journal of Applied Physics 84 (3): 1513–1523, 1998, doi:10.1063/1.368217.
[133] DJ DiMaria & JH Stathis, “Anode hole injection, defect generation, and breakdownin ultrathin silicon dioxide films,” Journal of Applied Physics 89 (9): 5015–5024,2001, doi:10.1063/1.1363680.
[134] E. Miranda, J. Sune, R. Rodriguez, M. Nafria, X. Aymerich, L. Fonseca, & F. Campabadal,“Soft breakdown conduction in ultrathin (3-5 nm) gate dielectrics,” IEEETransactions on Electron Devices 47 (1): 82–89, 2000, doi:10.1109/16.817571.
[135] Enrique Miranda & Jordi Sune, “Electron transport through broken down ultra-thin SiO2 layers in MOS devices,” Microelectronics Reliability 44 (1): 1–23, 2004, doi:10.1016/j.microrel.2003.08.005.
[136] R. Degraeve, G. Groeseneken, R. Bellens, J.L. Ogier, M. Depas, P.J. Roussel, & H.E. Maes, “New insights in the relation between electron trap generation and the statistical properties of oxide breakdown,” IEEE Transactions on Electron Devices 45 (4): 904–911, 1998, doi:10.1109/16.662800.
[137] J. Sune, G. Mura, & E. Miranda, “Are soft breakdown and hard breakdown of ultrathin gate oxides actually different failure mechanisms?,” IEEE Electron Device Letters 21 (4): 167–169, 2000, doi:10.1109/55.830970.
[138] S. Yasuda, H. Satake, T. Tanamoto, R. Ohba, K. Uchida, & S. Fujita,“Physical random number generator based on MOS structure after soft breakdown,”IEEE Journal of Solid-State Circuits 39 (8): 1375–1377, 2004, oi:10.1109/JSSC.2004.831480.
[139] Nurrachman Liu, Nathaniel Pinckney, Scott Hanson, Dennis Sylvester, & David laauw. “A true random number generator using time-dependent dielectric breakdown,” in 2011 Symposium on VLSI Circuits - Digest of Technical Papers, pages 216–217, 2011.
[140] K.-H. Chuang, E. Bury, R. Degraeve, B. Kaczer, G. Groeseneken, I. Verbauwhede, & D. Linten. “Physically unclonable function using CMOS breakdown position,” in 2017 IEEE International Reliability Physics Symposium (IRPS), pages 4C–1.1– 4C–1.7, 2017, doi:10.1109/IRPS.2017.7936312.
[141] Kai-Hsin Chuang, Erik Bury, Robin Degraeve, Ben Kaczer, Dimitri Linten, & Ingrid Verbauwhede, “A Physically Unclonable Function Using Soft Oxide Breakdown Featuring 0
[142] Jordi Muñoz Gorriz, Mireia Bargalló Gonzalez, Francesca Campabadal, Jordi Suñé, & Enrique A. Miranda, “Application of the Clustering Model to Time-Correlated Oxide Breakdown Events in Multilevel Antifuse Memory Cells,” IEEE Electron Device Letters 41 (12): 1770–1773, 2020, doi:10.1109/LED.2020.3033709.
[143] C.-H. Lin, B.-C. Hsu, M.H. Lee, & C.W. Liu, “A comprehensive study of inversion current in MOS tunneling diodes,” IEEE Transactions on Electron Devices 48 (9): 2125–2130, 2001, doi:10.1109/16.944205.
[144] M.S. Liang, C. Chang, Y.T. Yeow, C. Hu, & R.W. Brodersen, “Creation and termination of substrate deep depletion in thin oxide MOS Capacitors by charge tunneling,” IEEE Electron Device Letters 4 (10): 350–352, 1983, doi:10.1109/EDL.1983.25759.
[145] E. Miranda, J. Sune, R. Rodriguez, M. Nafria, & X. Aymerich. “Switching behavior of the soft breakdown conduction characteristic in ultra-thin (<5 nm) oxide MOS capacitors,” in 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173), pages 42–46, 1998, doi:10.1109/RELPHY.1998.670440.
[146] Chih Hang Tung, Kin Leong Pey, Lei Jun Tang, MK Radhakrishnan, Wen He Lin, Felix Palumbo, & Salvatore Lombardo, “Percolation path and dielectric-breakdown-induced-epitaxy evolution during ultrathin gate dielectric breakdown transient,” Applied Physics Letters 83 (11): 2223–2225, 2003, doi:10.1063/1.1611649.
[147] A. Ranjan, N. Raghavan, S.J. O’Shea, S. Mei, M. Bosman, K. Shubhakar, & K.L. Pey. “Mechanism of soft and hard breakdown in hexagonal boron nitride 2D dielectrics,” in 2018 IEEE International Reliability Physics Symposium (IRPS), pages 4A.1–1–4A.1–6, 2018, doi:10.1109/IRPS.2018.8353574.
[148] Seok-Hee Lee, Byung-Jin Cho, Jong-Choul Kim, & Soo-Han Choi. “Quasibreakdown of ultrathin gate oxide under high field stress,” in Proceedings of 1994 IEEE International Electron Devices Meeting, pages 605–608, 1994, doi:10.1109/IEDM.1994.383337.
[149] DZ-Y Ting, “An embedded quantum wire model of dielectric breakdown,” Applied physics letters 74 (4): 585–587, 1999, doi:10.1063/1.123153.
[150] Ming-Jer Chen, Ting-Kuo Kang, Chuan-Hsi Liu, Yih J Chang, & Kuan-Yu Fu, “Oxide thinning percolation statistical model for soft breakdown in ultrathin gate oxides,” Applied Physics Letters 77 (4): 555–557, 2000, doi:10.1063/1.127042.
[151] Wei-Chih Kao, Jun-Yao Chen, & Jenn-Gwo Hwu, “Transconductance sensitivity enhancement in gated-MIS (p) tunnel diode by self-protective effective local thinning mechanism,” Applied Physics Letters 109 (6), 2016, doi:10.1063/1.4960799.
[152] Chang-Feng Yang & Jenn-Gwo Hwu, “Light-to-Dark Current Ratio Enhancement on MIS Tunnel Diode Ambient Light Sensor by Oxide Local Thinning Mechanism and Near Power-Free Neighboring Gate,” IEEE Transactions on Electron Devices 65 (5): 1810–1816, 2018, doi:10.1109/TED.2018.2818187.
[153] Jen-Yuan Cheng, Chiao-Ti Huang, & Jenn–Gwo Hwu, “Comprehensive Study on the Deep Depletion Capacitance-Voltage Behavior for Metal-Oxide-Semiconductor Capacitor with Ultrathin Oxides,” J. Appl. Phys. 106 (7): 074507, 2009, doi:10.1063/1.3226853.
[154] Chang-Feng Yang & Jenn-Gwo Hwu, “Tunneling current induced frequency dispersion in the CV behavior of ultra-thin oxide MOS capacitors,” ECS Transactions 69 (5): 243, 2015, doi:10.1149/06905.0243ecst.
[155] Gaurav Gupta & Raymond J.E. Hueting. “Characteristic C - V profile as a signature for electrostatic doping in FD-SOI,” in 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOIULIS), pages 1–4, 2020, doi:10.1109/EUROSOI-ULIS49407.2020.9365304.
[156] Michel Depas, RL Van Meirhaeghe, WH Laflere, & Felix Cardon, “A quantitative analysis of capacitance peaks in the impedance of Al/SiOx/p-Si tunnel diodes,” Semiconductor science and technology 7 (12): 1476, 1992, doi:10.1088/0268- 1242/7/12/009.
[157] MA Green & J Shewchun, “Capacitance properties of MIS tunnel diodes,” Journal of Applied Physics 46 (12): 5185–5190, 1975, doi:10.1063/1.321583.
[158] T. Kawashima, K. S. Yew, Y. Zhou, D. S. Ang, M. K. Bera, & H. Z. Zhang, “Restoration of Postbreakdown Gate Oxide by White-Light Illumination,” IEEE Electron Device Letters 36 (8): 748–750, 2015, doi:10.1109/LED.2015.2445788.
[159] Dayanand Kumar, Aftab Saleem, Lai Boon Keong, Yeong Her Wang, & Tseung-Yuen Tseng, “Light Induced RESET Phenomenon in Invisible Memristor for Photo Sensing,” IEEE Electron Device Letters 43 (7): 1069–1072, 2022, doi:10.1109/LED.2022.3172866.
[160] Y. Zhou, D. S. Ang, P. S. Kalaga, & S. R. Gollu. “Oxide breakdown path for optical sensing at the nanoscale level,” in 2018 IEEE International Reliability Physics Symposium (IRPS), pages P–GD.8–1–P–GD.8–5, 2018, doi:10.1109/IRPS.2018.8353668.
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93246-
dc.description.abstract本篇博士論文深入探討了鋁/二氧化矽/p型矽組成的金屬-氧化層-半導體穿隧二極體(金氧半穿隧二極體)中的暫態電流行為。透過施加不同極性的寫入電壓並以相同電壓讀取,我們發現金氧半穿隧二極體之閘極可讀取到不同極性的暫態電流,可作為動態記憶體之雙態使用。論文前段主要聚焦於平面金氧半穿隧二極體的研究,通過大量實驗數據,我們評估了寫入電壓程式的極性、大小、持續時間及元件氧化層厚度對毫秒時間尺度下暫態電流的影響。實驗中發現,正向寫入電壓增加時,暫態電流會出現飽和現象,這可歸因於在從寫入電壓切換到讀取電壓的瞬間有大量多數載子電洞流入半導體中與儲存的少數載子電子做快速復合。我們透過TCAD模擬深入分析了在整個暫態過程中、包括了毫秒尺度之前的載子運動,並根據電洞流動方向將其分為三個時期:介電層弛豫期、電洞排出期和漂移復合期。我們進一步將漂移復合期這一過程建模,所得模型成功預測暫態電流之飽和電壓,模型分析與TCAD模擬結果的偏差僅為0.01伏。
為提高暫態電流性能,我們探索了薄金屬環繞閘極與氧化層局部薄化等特殊結構。薄金屬環繞閘極金氧半穿隧二極體實現了相較於最佳平面金氧半穿隧二極體4.5倍的暫態電流提升,歸因於薄金屬橫向電阻所造成環繞閘極底下儲存之電子產生的延遲效應。而通過在深空乏條件下施加電應力下引發介電層軟崩潰,可創造出氧化層局部薄化之金氧半穿隧二極體,其暫態電流性能比最佳平面結構提高了20倍,這是由於氧化層局部薄化區域的高穿隧機率會使半導體側在寫入時大量缺少電子,在讀取時將有極強的電子電流流經此一氧化層局部薄化區來補足這一缺額,使得暫態電流大幅提升。
在本論文的附錄中,我們藉助模擬深入探討了氧化層電荷對於平面金氧半穿隧二極體之暫態電流的影響。氧化層電荷會在元件外形成空乏區,加快儲存電子的復合速率,顯著降低毫秒時間尺度的暫態電流。此外,當氧化層電荷較多時會在元件外吸引電子,若施加較大的閘極寫入電壓,將導致元件外部電子匱乏,讀取時需透過載子生成來補充電子,從而產生反向暫態電流。
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dc.description.abstractThis dissertation investigates the transient current behavior in Al/SiO2/Si(p) metal-insulator-semiconductor tunnel diodes (MIS tunnel diode, MISTD). By applying write voltages of different polarities and reading at a constant voltage, we discovered that the gate of the MISTD can detect transient currents of varying polarities, which can serve as the two states for dynamic memory applications.
The initial part of the dissertation focuses on the Planar MISTD. Using extensive experimental data, we discussed the impact of write voltage polarity, write voltage magnitude, write time, and the oxide layer thickness on the transient current at the millisecond time scale. We observed that with an increase in positive write voltage, the transient current reaches a saturation point. This saturation is attributable to the rapid recombination of holes flooding into the semiconductor with the stored minority carrier electrons upon switching to the read voltage. Through TCAD simulations, we analyzed the movement of carriers during the transient process in the sub-millisecond regime, classifying the motion of holes into three periods: dielectric relaxation period, hole depletion period, and diffusion and recombination period. We further modeled the transient current during the diffusion and recombination period, finding that the modeling results aligned closely with the TCAD simulation results. Additionally, our model successfully predicted the saturation voltage of the transient current, deviating from the TCAD simulation results by only 0.01 volts.
To enhance transient current performance, we explored special structures such as the ultra-thin metal surrounded gate (UTMSG) MISTD and oxide local thinning (OLT) MISTD. The UTMSG MISTD achieved a 4.5 times increase in transient current compared to the best Planar device, due to the edge late response effect of the electrons under the surrounding gate caused by the lateral resistance of the thin metal. On the other hand, inducing dielectric soft breakdown under deep depletion stress created an OLT MISTD, which improved transient current performance by 20 times compared to the best Planar device. This improvement is due to the high tunneling probability in the locally thinned oxide region, leading to a significant electron deficiency on the semiconductor side during the write procedure. During reading, a strong electron current flows through this thinned oxide area to compensate for the deficiency, significantly boosting the transient current.
In the appendix, we further explore the impact of oxide charges on the transient current of Planar MISTD through simulations. The presence of oxide charges forms a depletion region outside the gate area, accelerating the recombination of stored electrons and significantly reducing the transient current at the millisecond scale. Moreover, an abundance of oxide charges will induce inversion electrons outside the device, leading to an electron deficiency when a larger gate write voltage is applied. During reading, this deficiency necessitates electron supply through carrier generation, thus forming a reverse transient current.
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dc.description.tableofcontentsAcknowledgments (Chinese) ... v
Abstract (Chinese) ... vii
Abstract (English) ... ix
Table of Contents ... xi
List of Figures ... xv
List of Tables ... xxvii
1 Introduction ... 1
1.1 Motivation ... 1
1.2 Basic Electrical Characteristics of MISTD ... 3
1.3 Transient Behavior in MISTD ... 10
1.4 Fabrication Process ... 14
1.5 Measurement Details ... 16
1.6 TCAD Simulation ... 19
1.7 Chapter Organization ... 21
2 Transient Currents of Planar MISTD at Millisecond Time Scales ... 23
2.1 Introduction ... 24
2.2 Transient Currents at Millisecond Time Scales ... 26
2.2.1 Overview ... 26
2.2.2 Negative Write Program ... 32
2.2.3 Positive Write Program ... 36
2.3 Simulation Results ... 40
2.4 Mechanism of The Saturation Phenomenon ... 43
2.4.1 Mechanism Details ... 43
2.4.2 Other Evidences ... 52
2.5 Optimal Parameters for The Planar MISTD ... 54
2.6 More About The Simulation ... 57
2.7 Impact of Oxide Charges on The Transient Currents ... 66
2.8 Summary ... 68
3 Simulation and Modeling of Transient Currents of Planar MISTD in The Sub-Millisecond Regime ... 71
3.1 Introduction ... 72
3.2 Simulation Results ... 73
3.2.1 Overview ... 73
3.2.2 Hole Motions: Dielectric Relaxation, Hole Depletion, and Diffusion and Recombination ... 81
3.2.3 Discharge of Excess Inversion Electrons ... 91
3.3 The Analytical Model ... 98
3.3.1 1/t Decaying Transient Current ... 100
3.3.2 Recombination-Dominant Regime ... 105
3.3.3 Modeling Results ... 107
3.3.4 Discussion on Initial Time Constant t0 ... 108
3.3.5 Saturation Voltage ... 111
3.4 Summary ... 114
4 Improvement of Transient Behavior in The Designed Ultra-Thin Metal Surrounded Gate MISTD ... 117
4.1 Introduction ... 117
4.2 Experimental ... 120
4.3 Improved Transient Current of The UTMSG MISTD .... 122
4.4 Improved Transient Capacitance of The UTMSG MISTD ... 125
4.4.1 Capacitance-Voltage Characteristics ... 126
4.4.2 Transient Capacitance ... 129
4.5 Summary ... 133
5 Enhancement of Transient Current Window in The Oxide Local Thinning MISTD via Dielectric Soft Breakdown ... 135
5.1 Introduction ... 135
5.2 Enhanced Transient Current of The OLT MISTD ... 137
5.2.1 Experimental Results ... 137
5.2.2 Discussions ... 144
5.2.3 Simulation Results ... 147
5.3 Self-Protective Soft Breakdown ... 151
5.4 Summary ... 156
6 Conclusion 159
6.1 Conclusions ... 159
6.2 Benchmark ... 163
6.3 Future Works ... 166
Appendix A Transient Current Behavior in Planar MIS Tunnel Diodes with Oxide Charges ... 173
A.1 Overview ... 173
A.2 Decreased Transient Current Magnitude Due to Accelerated Recombination in The Extended Depletion Region ... 178
A.3 Reversed Transient Current Direction For Substantial Oxide Charges Under Large Write Voltage ... 192
A.4 Summary ... 205
References ... 207
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dc.language.isoen-
dc.subject暫態電流zh_TW
dc.subject暫態行為zh_TW
dc.subject介電層軟崩潰zh_TW
dc.subject解析模型zh_TW
dc.subject金氧半穿隧二極體zh_TW
dc.subject動態記憶體zh_TW
dc.subject金氧半電容zh_TW
dc.subjectMIS capacitoren
dc.subjectMIS tunnel diodeen
dc.subjectDielectric soft breakdownen
dc.subjectTransient behavioren
dc.subjectTransient currenten
dc.subjectDynamic memoryen
dc.subjectAnalytical modelen
dc.title金氧半穿隧二極體之暫態電流行為zh_TW
dc.titleTransient Current Behavior in MIS Tunnel Diodesen
dc.typeThesis-
dc.date.schoolyear112-2-
dc.description.degree博士-
dc.contributor.oralexamcommittee張廖貴術;陳敏璋;連振炘;許渭州;李敏鴻;曾俊元zh_TW
dc.contributor.oralexamcommitteeKuei-Shu Chang-Liao;Miin-Jang Chen;Chen-Hsin Lien;Wei-Chou Hsu;Min-Hung Lee;Tseung-Yuen Tsengen
dc.subject.keyword金氧半穿隧二極體,金氧半電容,動態記憶體,暫態電流,暫態行為,介電層軟崩潰,解析模型,zh_TW
dc.subject.keywordMIS tunnel diode,MIS capacitor,Dynamic memory,Transient current,Transient behavior,Dielectric soft breakdown,Analytical model,en
dc.relation.page232-
dc.identifier.doi10.6342/NTU202401597-
dc.rights.note同意授權(全球公開)-
dc.date.accepted2024-07-11-
dc.contributor.author-college電機資訊學院-
dc.contributor.author-dept電子工程學研究所-
顯示於系所單位:電子工程學研究所

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