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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93124| 標題: | 應用於物聯網裝置之低功耗時脈產生器與溫度感測器 Low-Power Clock Generator and Temperature Sensors for IoT Applications |
| 作者: | 楊軒 Shuan Yang |
| 指導教授: | 林宗賢 Tsung-Hsien Lin |
| 關鍵字: | 物聯網應用,參考時脈產生器,弛張振盪器,低工作週期校正,溫度感測器,相位域三角積分轉換器, IoT Application,Reference Clock Generator,Relaxation Oscillator,Duty-Cycled Calibration,Temperature Sensor,Phase-Domain Delta-Sigma Modulator, |
| 出版年 : | 2024 |
| 學位: | 碩士 |
| 摘要: | 在物聯網裝置中,參考時脈訊號產生器及溫度感測器皆為重要的組成部分。本篇論文探討了這兩種系統,並提出了可應用於物聯網系統中的超低功耗的晶片內參考時脈產生器,以及一個小面積的時域溫度感測器。
第一個作品著重於32.768千赫茲、具有嵌入式溫度感測功能的時脈產生器。此電路使用了一個基於RC的弛張振盪器,並透過一個百萬赫茲頻段的石英振盪器進行校正。校正過程使用了一個數位鎖頻迴路並運作於0.2%的低工作週期以節省系統功耗。嵌入的溫度感測器則透過偵測系統中數位控制振盪器的控制訊號,來擷取溫度的資訊。此晶片使用TSMC 90奈米製程下線,其平均功耗為339奈瓦特。產生的時脈訊號在攝氏-40至85度的溫度範圍內,可達到+25/-63百萬分點的頻率穩定度。嵌入的溫度感測器則有攝氏1度的溫度解析度,並且不會對系統造成額外的負擔。 第二部分則呈現了一個小面積的時域溫度感測器。此溫度感測器以基於熱敏電阻的RC濾波器作為前端,並透過相位域三角積分轉換器進行數位數值之讀取。類比形式的第一級積分器有效的減小了此系統的頻寬內雜訊,而以快閃式類比-數位轉換器實現的量化器及相位域的回授則有助於減小系統非線性度的影響。此晶片以TSMC 90奈米製程實現,核心面積為0.01平方毫米,功耗為33微瓦特,可運作於攝氏-55至125度,並能達到232 fJ·K²的能量效率。 Reference clock generators and temperature sensors (TSs) are essential components in IoT systems. This thesis explores these systems and proposes an ultra-low-power on-chip reference clock generator and a compact time-domain temperature sensor for IoT applications. The first work focuses on a 32.768-kHz clock generator with an embedded TS. The proposed circuit employs an RC-based relaxation oscillator, which is calibrated using an MHz-range crystal oscillator (XO). The calibration process utilizes a digital frequency-locked loop (DFLL) and operates with a 0.2% duty cycle to conserve power. The embedded TS extracts temperature information by monitoring the digitally controlled oscillator (DCO) control codes, which are inherently available in the system. Fabricated using the TSMC 90-nm CMOS process, this chip consumes an average power of 339 nW. The clock signal achieves a frequency stability of +25/-63 ppm over a temperature range of -40 to 85 °C. The embedded TS achieves a temperature resolution of 1 °C, adding significant value to the system without incurring additional overhead. The second work presents a compact time-domain TS. It utilizes a thermistor-based RC filter as the sensing front-end and incorporates a phase-domain delta-sigma modulator (PD-DSM) for digital readout. The analog first-stage integrator effectively reduces the system’s in-band noise. The inclusion of a flash ADC as a quantizer and phase-domain feedback helps eliminate the effects of non-linearity. This chip, also fabricated in the TSMC 90-nm process, has a core area of 0.01 mm² and a power consumption of 33 μW. It operates over a temperature range of -55 to 125 °C, achieving a resolution figure of merit (FoM) of 232 fJ·K². |
| URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/93124 |
| DOI: | 10.6342/NTU202401615 |
| 全文授權: | 同意授權(限校園內公開) |
| 電子全文公開日期: | 2029-07-15 |
| 顯示於系所單位: | 電子工程學研究所 |
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