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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 吳肇欣 | zh_TW |
dc.contributor.advisor | Chao-Hsin Wu | en |
dc.contributor.author | 楊舒婷 | zh_TW |
dc.contributor.author | Shu-Ting Yang | en |
dc.date.accessioned | 2024-01-28T16:33:27Z | - |
dc.date.available | 2024-02-24 | - |
dc.date.copyright | 2024-01-28 | - |
dc.date.issued | 2023 | - |
dc.date.submitted | 2023-08-10 | - |
dc.identifier.citation | 1. Nourbakhsh, A., A. Zubair, R.N. Sajjad, et al., MoS2 field-effect transistor with sub-10 nm channel length. Nano letters, 2016. 16(12): p. 7798-7806.
2. Jariwala, D., V.K. Sangwan, C.-C. Wu, et al., Gate-tunable carbon nanotube–MoS2 heterojunction pn diode. Proceedings of the National Academy of Sciences, 2013. 110(45): p. 18076-18080. 3. Sanaullah, M. and M.H. Chowdhury. Subthreshold swing characteristics of multilayer MoS2 tunnel FET. in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS). 2015. IEEE. 4. Zhang, X., J. Grajal, X. Wang, et al. MoS2 phase-junction-based Schottky diodes for RF electronics. in 2018 IEEE/MTT-S International Microwave Symposium-IMS. 2018. IEEE. 5. Shrivastava, M. and V. Ramgopal Rao, A roadmap for disruptive applications and heterogeneous integration using two-dimensional materials: State-of-the-art and technological challenges. Nano Letters, 2021. 21(15): p. 6359-6381. 6. Li, Z., X. Meng, and Z. Zhang, Recent development on MoS2-based photocatalysis: A review. Journal of Photochemistry and Photobiology C: Photochemistry Reviews, 2018. 35: p. 39-55. 7. Golovynskyi, S., I. Irfan, M. Bosi, et al., Exciton and trion in few-layer MoS2: Thickness-and temperature-dependent photoluminescence. Applied Surface Science, 2020. 515: p. 146033. 8. X射線光電子能譜學. 2022/05/19; Available from: https://zh.wikipedia.org/zh-tw/X%E5%B0%84%E7%BA%BF%E5%85%89%E7%94%B5%E5%AD%90%E8%83%BD%E8%B0%B1%E5%AD%A6. 9. Kondekar, N.P., M.G. Boebinger, E.V. Woods, et al., In situ XPS investigation of transformations at crystallographically oriented MoS2 interfaces. ACS applied materials & interfaces, 2017. 9(37): p. 32394-32404. 10. Chen, P.-C., C.-P. Lin, C.-J. Hong, et al., Effective N-methyl-2-pyrrolidone wet cleaning for fabricating high-performance monolayer MoS2 transistors. Nano Research, 2019. 12: p. 303-308. 11. Liu, W., D. Sarkar, J. Kang, et al., Impact of contact on the operation and performance of back-gated monolayer MoS2 field-effect-transistors. Acs Nano, 2015. 9(8): p. 7904-7912. 12. Lan, Y.-W., P.-C. Chen, Y.-Y. Lin, et al., Scalable fabrication of a complementary logic inverter based on MoS2 fin-shaped field effect transistors. Nanoscale Horizons, 2019. 4(3): p. 683-688. 13. Shen, P.-C., C. Su, Y. Lin, et al., Ultralow contact resistance between semimetal and monolayer semiconductors. Nature, 2021. 593(7858): p. 211-217. 14. Xu, R., H. Jang, M.-H. Lee, et al., Vertical MoS2 double-layer memristor with electrochemical metallization as an atomic-scale synapse with switching thresholds approaching 100 mV. Nano letters, 2019. 19(4): p. 2411-2417. 15. Tian, Y., L. Jiang, X. Zhang, et al., Trap-assisted transition between Schottky emission and Fowler-Nordheim tunneling in the interfacial-memristor based on Bi2S3 nano-networks. AIP Advances, 2018. 8(3): p. 035105. 16. Farronato, M., M. Melegari, S. Ricci, et al., Memtransistor devices based on MoS2 multilayers with volatile switching due to Ag cation migration. Advanced Electronic Materials, 2022. 8(8): p. 2101161. 17. Sangwan, V.K., H.-S. Lee, H. Bergeron, et al., Multi-terminal memtransistors from polycrystalline monolayer molybdenum disulfide. Nature, 2018. 554(7693): p. 500-504. 18. Jadwiszczak, J., D. Keane, P. Maguire, et al., MoS2 memtransistors fabricated by localized helium ion beam irradiation. ACS nano, 2019. 13(12): p. 14262-14273. 19. Vinod, P., Specific contact resistance measurements of the screen-printed Ag thick film contacts in the silicon solar cells by three-point probe methodology and TLM method. Journal of Materials Science: Materials in Electronics, 2011. 22: p. 1248-1257. 20. Noda, K., Using hot carrier injection for embedded non-volatile memory. NSCore White Paper, 2008. 21. Zhao, P., A. Khosravi, A. Azcatl, et al., Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance–voltage analysis. 2D Materials, 2018. 5(3): p. 031002. 22. Kerfriden, S., A.H. Nahlé, S.A. Campbell, et al., Short CommunicationThe electrochemical etching of tungsten STM tips. Electrochimica Acta, 1998. 43(12-13): p. 1939-1944. 23. Liu, Y., J. Guo, Y. Wu, et al., Pushing the performance limit of sub-100 nm molybdenum disulfide transistors. Nano letters, 2016. 16(10): p. 6337-6342. 24. McClellan, C.J., E. Yalon, K.K. Smithe, et al. Effective n-type doping of monolayer MoS2 by AlOx. in 2017 75th annual device research conference (DRC). 2017. IEEE. 25. Shao, P.-Z., H.-M. Zhao, H.-W. Cao, et al., Enhancement of carrier mobility in MoS2 field effect transistors by a SiO2 protective layer. Applied Physics Letters, 2016. 108(20): p. 203105. 26. Wang, Y., J.C. Kim, R.J. Wu, et al., Van der Waals contacts between three-dimensional metals and two-dimensional semiconductors. Nature, 2019. 568(7750): p. 70-74. 27. Lee, H.S., V.K. Sangwan, W.A.G. Rojas, et al., Dual‐Gated MoS2 Memtransistor Crossbar Array. Advanced Functional Materials, 2020. 30(45): p. 2003683. 28. Widiapradja, L.J., T. Nam, Y. Jeong, et al., 2D MOS2 charge injection memory transistors utilizing hetero‐stack SIO2/HFO2 dielectrics and oxide interface traps. Advanced Electronic Materials, 2021. 7(5): p. 2100074. | - |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/91565 | - |
dc.description.abstract | 二維材料元件擁有超越矽電子元件的潛在優勢,然而在金屬與半導體界面通常會產生金屬誘發的能隙態,導致較高的接觸電阻。因此,本研究利用已開發出的半金屬鉍 (Bi) 作為接觸電極,以提高二硫化鉬 (MoS2) 場效應電晶體 (FET) 的性能表現。透過半金屬接觸電極的結合,以及針對材料表面的 N-甲基-2-吡咯烷酮 (NMP) 清潔技術,我們成功實現了製作單層 MoS2 FET,並實現了歐姆接觸,在室溫下,我們的元件顯示出約 95 Ω µm 的低接觸電阻和七個數量級的電流開關比。
經確認良好的接觸電極品質後,我們便能夠避免憶阻器設計受到電極接觸電阻的干擾。接著,我們成功開發了一種使用高 k 值氧化層的MoS2憶阻器電晶體元件,此元件具有閘極可調性和憶阻器開關特性。MoS2憶阻器電晶體可透過兩種輸入的脈衝電壓(汲極或閘極)來調控電流特性,並且展現四個數量級的開關電阻狀態。僅需小於 ±3V 的汲極或閘極脈衝電壓,即可實現程式寫入和擦除操作。這是因為在氧化層和漏電極界面處,短通道效應的熱載子被捕獲造成氧化層陷阱態密度變化,而閘極引起的電荷注入氧化層則導致了這種效應。 最後,本研究利用單層單晶二硫化鉬的材料,將憶阻器和電晶體功能集成到單一個元件中,這在應用上包括神經形態學習和持續縮小的摩爾定律的超越,提供了一種全新的方式。這種新型元件的成功開發,為未來的科技發展帶來了潛力。 | zh_TW |
dc.description.abstract | Two-dimensional (2D) material-based nanodevices are of technological interests for beyond-silicon electronics. However, energy barriers at the metal-semiconductor interface, i.e., metal-induced gap states (MIGS), result in high contact resistance. A semi-metallic bismuth electrode has been created to enhance the performance of MoS2 field effect transistors (FETs). Herein, we present superior performance monolayer MoS2 FET with Ohmic contact through bismuth contact electrode and N-methyl-2-pyrrolidone (NMP) wet cleaning which can provide an intrinsic surface. By doing so, a low contact resistance of ~95 Ω µm is realized at room temperature. Furthermore, following this approach, we also realize a memory transistor using a high-k dielectric which shows gate tunability and memristive switching. The MoS2 memtransistors demonstrate individual resistance states by four orders of magnitude, and low gate voltage pulses below ±3V is enough to achieve 20 different states which would occur through the hot carriers injection trapped at the dielectric and drain electrode interface. Overall, this study aims to integrate memristor and transistor functionalities into a single device, which is desirable to diverse applications including neuromorphic learning and continued downscaling beyond Moore’s law. | en |
dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2024-01-28T16:33:27Z No. of bitstreams: 0 | en |
dc.description.provenance | Made available in DSpace on 2024-01-28T16:33:27Z (GMT). No. of bitstreams: 0 | en |
dc.description.tableofcontents | 致謝 i
摘要 ii Abstract iii 目錄 iv 圖目錄 vii 表目錄 x 1 第一章 緒論 1 1.1 二維材料的發展與應用 1 1.2 二硫化鉬之基本特性 3 1.3 研究動機 4 2 第二章 理論與文獻回顧 5 2.1 二硫化鉬之材料分析 5 2.1.1 拉曼光譜學 (Raman Spectrum) 5 2.1.2 光致發光光譜學 (Photoluminunesence, PL) 7 2.1.3 掃描式光電子顯微儀 (Scanning Photoelectron Microscopy, SPEM) 8 2.2 二硫化鉬電晶體及憶阻器電晶體特性 10 2.2.1 電晶體特性 (Transistor) 10 2.2.2 憶阻器特性 (Memristor) 12 2.2.3 憶阻器電晶體特性 (Memory-Transistor) 14 2.3 元件設計與機制 15 2.3.1 歐姆接觸量測原理 15 2.3.2 熱載子注入效應 16 2.3.3 電容電壓量測法 17 3 第三章 實驗儀器介紹 19 3.1 製程儀器 19 3.1.1 旋轉塗佈機 (Spin Coater) 19 3.1.2 電子束微影系統 (Electron Beam Lithography) 20 3.1.3 熱蒸鍍機 (Thermal Evaporator) 21 3.1.4 電漿機 (Plasma Machine) 22 3.1.5 掃描式電子顯微鏡 (Scanning Electron Microscope) 22 3.1.6 電性量測系統 (Electrical Measurement System) 24 3.2 製程流程 (Process Flow) 25 3.2.1 二硫化鉬直接成長 (Directly Growth) 25 3.2.2 製作標準晶片 (Standard Chip Fabrication) 25 3.2.3 濕式轉移二硫化鉬 (Wet Transfer) 26 3.2.4 圖案設計及電極製作 (Pattern Design) 27 4 第四章 結果與討論 30 4.1 材料分析結果 30 4.1.1 單層二硫化鉬之拉曼光譜學分析 30 4.1.2 光致發光光譜學分析 31 4.1.3 X射線光電子能譜分析 32 4.1.4 掃描式電子顯微鏡分析 33 4.2 單層二硫化鉬電晶體特性分析 34 4.2.1 三端電性量測及元件特性 34 4.2.2 電晶體之性能比較 36 4.3 單層二硫化鉬之憶阻器電晶體特性分析 37 4.3.1 憶阻器電晶體元件特性 37 4.3.2 調控多階狀態 (Multi-States Control) 42 4.3.3 三端調控憶阻器電晶體 (Three-Terminal Memtransistor ) 42 4.4 機制討論 44 4.4.1 熱載子注入氧化層 (Hot Carrier Injection) 44 4.4.2 短通道效應對憶阻器電晶體的影響 46 4.4.3 閘極脈衝電壓機制討論 48 5 第五章 結論與未來展望 51 6 參考文獻 52 | - |
dc.language.iso | zh_TW | - |
dc.title | 利用熱載子效應形成單晶單層二硫化鉬憶阻器電晶體 | zh_TW |
dc.title | Single crystalline monolayer MoS2 memtransistors enabled by hot carriers | en |
dc.type | Thesis | - |
dc.date.schoolyear | 111-2 | - |
dc.description.degree | 碩士 | - |
dc.contributor.oralexamcommittee | 藍彥文;孫允武;孫建文 | zh_TW |
dc.contributor.oralexamcommittee | Yann-Wen Lan;Yuen-Wuu Suen;Kien-Wen Sun | en |
dc.subject.keyword | 憶阻器電晶體,接觸電阻,電阻式開關,多功能元件,半金屬, | zh_TW |
dc.subject.keyword | memtransistor,contact resistance,resistive switching,multifunctional device,high carrier mobility, | en |
dc.relation.page | 54 | - |
dc.identifier.doi | 10.6342/NTU202303464 | - |
dc.rights.note | 同意授權(限校園內公開) | - |
dc.date.accepted | 2023-08-11 | - |
dc.contributor.author-college | 電機資訊學院 | - |
dc.contributor.author-dept | 光電工程學研究所 | - |
顯示於系所單位: | 光電工程學研究所 |
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