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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 管傑雄 | zh_TW |
dc.contributor.advisor | Chieh-Hsiung Kuan | en |
dc.contributor.author | 陳人豪 | zh_TW |
dc.contributor.author | Ren-Hao Chen | en |
dc.date.accessioned | 2023-08-16T16:27:05Z | - |
dc.date.available | 2023-11-09 | - |
dc.date.copyright | 2023-08-16 | - |
dc.date.issued | 2023 | - |
dc.date.submitted | 2023-08-09 | - |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/88940 | - |
dc.description.abstract | 隨著現今電子設備和通信系統的進步,對於高頻、高功率和高電壓的要求也提高,而第一代半導體(Si、Ge)和第二代半導體(GaAs、InP)的溫度、頻率和功率也已經達到極限,這時第三代半導體(GaN、SiC)的出現,也使這些瓶頸有了突破,尤以GaN磊晶層搭配SiC基板最令人注目,因此材料系統具備寬能隙、SiC高導熱係數等材料優勢。
本論文致力於圖案化SiC基板之開發,用以減低GaN磊晶層內之缺陷密度。首先,為了探討陰極射線發光技術是否可以作為量測差排的方法,將使用XRD量測技術去探討一般基板之磊晶結構的缺陷密度大小,並說明CL的量測結果是否可以分析差排密度。針對圖案化SiC基板之開發,本論文研發磊晶側向生長法(ELOG)與圖案化4H-SiC基板。透過一系列的製程製造出圖案化的二氧化矽柱,並且使用陰極射線發光技術來量測ELOG法做出來的氮化鎵磊晶層的缺陷密度,以及探討圖案尺寸與差排密度之間的關係。 在使用圖案化4H-SiC基板方法前,本文會先介紹反應式離子蝕刻(RIE)蝕刻4H-SiC的方法,並調整RIE的氣體流量、壓力、功率和時間,以實現事先設計好的圖案和蝕刻深度,隨後進行微縮尺寸的處理。最終,透過本文的探討與研究希望能製造出低缺陷的氮化鎵磊晶層,並期望未來可以應用於高電子遷移率電晶體(HEMT)的製作。 | zh_TW |
dc.description.abstract | With the advancement of electronic devices and communication systems, the requirements for high frequency, high power, and high voltage have increased. The temperature, frequency, and power limits of the first-generation semiconductors (Si, Ge) and second-generation semiconductors (GaAs, InP) have already been pushed to their limitations. The emergence of third-generation semiconductors has provided breakthroughs in these limitations, especially the combination of GaN epitaxial layers with SiC substrates, which is particularly noteworthy due to the material system's advantages such as wide bandgap and high thermal conductivity of SiC.
This work is dedicated to the development of patterned SiC substrates to reduce defect density within GaN epitaxial layers. First, in order to explore whether cathodoluminescence (CL) can serve as a method for measuring dislocation density, X-ray diffraction (XRD) measurement techniques will be used to investigate the defect density of the epitaxial structures, and the CL measurement results will be analyzed to assess dislocation density. For the development of patterned SiC substrates, this study investigates epitaxial lateral overgrowth (ELOG) and patterned 4H-SiC substrates. A series of processes are employed to create patterned silicon dioxide (SiO2) pillars, and the CL technology is utilized to measure the defect density of the GaN epitaxial layers produced by the ELOG method, as well as to explore the relationship between pattern dimensions and dislocation density. Before utilizing the method of patterned 4H-SiC substrates, this work introduces the reactive ion etching (RIE) technique for etching 4H-SiC, adjusting RIE gas flow, pressure, power, and time to achieve pre-designed patterns and etching depths, followed by fine-scale treatment. Ultimately, through the exploration and research presented in this study, the aim is to manufacture low-defect GaN epitaxial layers, with the future expectation of their application in the production of high electron mobility transistors (HEMTs). | en |
dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2023-08-16T16:27:05Z No. of bitstreams: 0 | en |
dc.description.provenance | Made available in DSpace on 2023-08-16T16:27:05Z (GMT). No. of bitstreams: 0 | en |
dc.description.tableofcontents | 口試委員會審定書 i
誌謝 ii 中文摘要 iii ABSTRACT iv CONTENTS vi LIST OF FIGURES x LIST OF TABLES xv Chapter 1 緒論 1 1.1 前言 1 1.2 研究動機 3 1.3 論文架構 5 Chapter 2 理論基礎與材料分析 7 2.1 碳化矽基板(SiC Substrate) 7 2.1.1 晶體結構(Crystal Structure) 8 2.1.2 碳化矽基板的生長方法(Substrate Growth Method of SiC) 10 2.1.3 微導管密度(micropipe density) 13 2.2 蝕刻原理 15 2.2.1 蝕刻種類 15 2.2.2 乾式蝕刻原理 16 2.3 氮化鎵薄膜 (Gallium Nitride, GaN) 17 2.3.1 晶體結構(Crystal Structure) 17 2.3.2 應力 (Strain) 18 2.3.3 差排 (Dislocation) 20 2.3.4 晶體成長 21 Chapter 3 實驗設備與製程流程 24 3.1 實驗儀器 24 3.1.1 電漿輔助化學氣相沉積 (Plasma Enhanced Chemical Vapor Deposition, PECVD) 24 3.1.2 有機金屬化學氣相沉積 (Metal-organic Chemical Vapor Deposition, MOCVD) 25 3.1.3 電子束蒸鍍 (Electron Beam Evaporation, E-gun) 26 3.1.4 電子束微影 (Electron Beam Lithography) 27 3.1.5 反應式離子蝕刻 (Reactive Ion etching, RIE) 29 3.1.6 掃描式電子顯微鏡 (Scanning Electron Microscope, SEM) 29 3.1.7 陰極射線發光 (Cathodoluminescence, CL) 31 3.1.8 X射線繞射儀 (X-ray Diffractometer, XRD) 31 3.2 製程流程 32 3.2.1 圖案化4H-SiC基板製作 32 3.2.2 磊晶側向成長法製作 39 3.2.3 氮化鎵(GaN)磊晶 45 Chapter 4 X-Ray繞射儀(XRD)和陰極射線發光(CL)量測原理及儀器介紹 46 4.1 X-Ray繞射儀(XRD) 46 4.1.1 XRD量測原理 46 4.1.2 XRD儀器介紹 48 4.2 陰極射線發光 (CL) 50 4.2.1 CL量測原理 50 4.2.2 CL成像 (CL mapping) 51 4.2.3 CL mapping分析差排 52 4.2.4 CL儀器介紹 55 Chapter 5 實驗結果與分析 59 5.1 基板之磊晶結構研究 59 5.1.1 磊晶結構 59 5.1.2 Sample A量測結果分析 60 5.1.3 Sample B量測結果分析 61 5.1.4 Sample C量測結果分析 61 5.1.5 Sample A、Sample B、Sample C量測結果比較 70 5.2 磊晶側向成長法研究 71 5.2.1 磊晶結構 71 5.2.2 Sample D二氧化矽層圖案設計 71 5.2.3 Sample D圖案化二氧化矽柱量測結果與分析 73 5.3 圖案化4H-SiC基板研究 75 5.3.1 蝕刻碳化矽基板 75 5.3.2 圖案化4H-SiC基板圖案設計 87 Chapter 6 結論及未來展望 91 參考資料 92 | - |
dc.language.iso | zh_TW | - |
dc.title | 圖案化4H碳化矽基板上氮化鎵磊晶層之研究 | zh_TW |
dc.title | Investigation of GaN Epitaxial Layers on Patterned 4H-SiC Substrates | en |
dc.type | Thesis | - |
dc.date.schoolyear | 111-2 | - |
dc.description.degree | 碩士 | - |
dc.contributor.coadvisor | 蘇文生;林致廷 | zh_TW |
dc.contributor.coadvisor | Vin-Cent Su;Chih-Ting Lin | en |
dc.contributor.oralexamcommittee | 孫允武;孫建文;朱富權 | zh_TW |
dc.contributor.oralexamcommittee | Yuen-Wuu Suen;Kien-Wen Sun;Fu-Chiuan Chu | en |
dc.subject.keyword | 圖案化4H-SiC基板,ELOG,氮化鎵,碳化矽,乾式蝕刻,RIE,電子束微影,陰極射線發光,XRD,HEMT, | zh_TW |
dc.subject.keyword | Patterned 4H-SiC substrate,ELOG,GaN,SiC,Dry etching,RIE,E-Beam lithography,CL,XRD,HEMT, | en |
dc.relation.page | 97 | - |
dc.identifier.doi | 10.6342/NTU202303532 | - |
dc.rights.note | 同意授權(全球公開) | - |
dc.date.accepted | 2023-08-10 | - |
dc.contributor.author-college | 電機資訊學院 | - |
dc.contributor.author-dept | 電子工程學研究所 | - |
顯示於系所單位: | 電子工程學研究所 |
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