微縮閘極線寬之SiC基板HEMT的電性研究與三層光阻法開發T型閘極

Abstract

氮化鎵屬於第三代半導體，具備了寬能隙、高電子遷移率、高載子傳輸速度與高崩潰電場等特性，而以氮化鋁鎵/氮化鎵為材料的高電子遷移率電晶體，在氮化鋁鎵及氮化鎵接面處會有極化反應的產生，進而生成高濃度的二維電子氣(Two-dimensional electron gas, 2DEG)，使得此電晶體能在高頻及高功率元件中有良好的特性表現及發展空間。 本論文採用以碳化矽(SiC)基板為底搭配氮化鎵磊晶層而成之試片，研究微縮閘極線寬對高電子遷移率電晶體之影響，且將該製作之元件進行電性量測及分析。此外，本論文並於矽基板上利用三層光阻( ZEP(1:1)/LOR/ZEP(1:1) )之T型閘極技術與角標對準優化技術製作出小閘極線寬。利用角標對準優化技術，讓實驗之二次對準良率提高，再加上三層光阻( ZEP(1:1)/LOR/ZEP(1:1) )定義出T型的閘極，並使用電子束微影技術成功開發出閘極線寬(T型閘極的, T-foot,)78.5奈米的元件，最後利用簡化後的公式，進行高頻特性參數的估算及比較。

Gallium nitride (GaN) belongs to the third generation of semiconductors, possessing characteristics such as a wide bandgap, high electron mobility, high carrier velocity, and high breakdown electric field. High electron mobility transistors (HEMTs) using AlGaN/GaN as the material exhibit polarization effects at the AlGaN/GaN interface, resulting in the generation of a high-density two-dimensional electron gas (2DEG). This enables the HEMTs to exhibit excellent performance and development potential in high-frequency and high-power devices. This study utilizes silicon carbide (SiC) substrates with GaN epitaxial layers to investigate the effect of gate width reduction on HEMTs, and to perform electrical measurements and analyses on the fabricated devices. Additionally, this work employs a T-gate fabrication technique using three layers of resist (ZEP(1:1) / LOR / ZEP(1:1)) and an alignment optimization technique on silicon substrates to produce smaller gate widths. By utilizing the alignment optimization technique, the secondary alignment yield of the experiment is improved. Moreover, a T-shaped gate was defined using a three-layer photoresist (ZEP(1:1)/LOR/ZEP(1:1)), and the electron beam lithography technique was successfully employed to develop devices with a gate width (T-foot, the foot of the T-shaped gate) of 78.5 nanometers. Finally, a simplified formula is used to estimate and compare high-frequency characteristic parameters.