低熱預算石墨烯全包覆鈷內導線

Abstract

隨著半導體製程演進，後端製程互連的寬度及間距逐漸微縮，互連的電阻率及互連之間的電容隨尺寸微縮而上升，兩相下交互之下電路產生更嚴重的RC延遲，有可能會讓整體訊號的傳遞逐漸被導線延遲主宰而限制了晶片原始的效能。銅金屬因為具有較高的電子平均自由徑，導致其在小尺度的電子散射更加嚴重，電阻率比某些金屬更高，除此之外銅金屬需要搭配阻擋層的製程才能防止銅原子擴散至介電層，為了解決銅互連遇到的瓶頸以及電致遷移導致的負面影響，本研究以自製的熱燈絲化學氣相沉積在銅互連的替代材料鈷互連表面生長全包覆石墨烯，藉此提升整體線路的效能及可靠度。 本研究的石墨烯製程溫度為380 ℃，溫度低於後端製程的熱預算400 ℃，並且是直接在鈷互連表面生長材料無須經過轉移的步驟，是一項與後段製程相融的石墨烯製程技術，由拉曼頻譜可以初步證實鈷薄膜除了表面之外在底部也有石墨烯的生成，另外由鈷導線的小線寬拉曼頻譜可以證實此方法可以應用在微米尺度以下的互連製程。由導線截面的TEM圖和EDS素像圖可以直接觀察到，鈷金屬的上方、底部及側面皆有石墨烯的層狀結構以及碳元素的訊號點，證實我們製作出全包覆石墨烯的互連結構。 全包覆石墨烯鈷互連的電阻率比退火鈷互連下降約26.6%，石墨烯包覆可以提供鈷互連額外的電子通道，這樣可以達到並聯的效果，另外石墨烯可以改善互連表面的電子散射，所以可以降低互連的有效電阻率；全包覆石墨烯鈷互連的崩潰電流密度比退火鈷互連提升10.3%，石墨烯包覆除了可以降低導線電阻率，其優良的導熱特性可以抑制焦耳加熱引起的導線升溫，提高導線的耐受能力；本研究以30 MA/cm2 的電流密度，在200°C環境溫度量測互連的失效時間，全包覆石墨烯鈷互連的失效時間中位數為退火鈷互連的35.8倍。總結來說，鈷-石墨烯異質結構有更低的電阻值、更高的崩潰電流密度及更長的導線平均失效時間。

With the evolution of the semiconductor process, the width of interconnects and spacing between interconnects are gradually shrinking. The resistivity of the interconnect and the capacitance between the interconnects increase with the shrinkage of the interconnect size and the electronic circuits suffer from serious RC delay. It is possible that the overall signal transmission will be dominated by circuit delays and limit the original performance of the chip. Copper has higher electron mean free path, which leads to more serious electron scattering and higher resistivity in small scales. In addition, copper needs to be processed with a barrier layer to prevent copper atoms diffusing into dielectric layer. In order to solve the bottleneck of copper interconnect and suppress electromigration, this study used hot wire chemical vapor deposition (HWCVD) to fabricate graphene-all-around in cobalt interconnect improving the performance and reliability of the overall circuit. The graphene fabrication method is a back-end-of-line (BEOL) compatible process. The deposition temperature of the graphene process is 380 °C, which is lower than the thermal budget of the BEOL of 400 °C. Graphene was directly grown on the surface of the cobalt interconnect without transfer. Raman spectrum can preliminarily confirm that the cobalt thin film also has graphene on the bottom. In addition, the Raman spectrum of cobalt wire can confirm that this method can be applied below micron scale. It can be directly observed from the TEM images and EDS mapping of the cross-section of the cobalt wire that there are graphene layers on the top, bottom, and side of the wire, which proves that we have produced a graphene-all-around interconnect. The resistivity of graphene-all-around in cobalt interconnect is 26.6% lower than that of annealed cobalt interconnect. Graphene acts as additional electron pathway in cobalt interconnect and has the effect of parallel connection. Graphene can also suppress electron surface scattering in cobalt wire and the effective resistivity of the interconnect can be reduced. The breakdown current density of graphene-all-around in cobalt interconnect is 10.3% higher than that of the annealed cobalt interconnect. The characteristics of graphene can suppress the temperature increase in cobalt produced by Joule heating and improve the reliability of the interconnect. The time-to-failure of the interconnect was measured at 200 ℃ under a continuous DC stress of 30 MA/cm2. The graphene-all-around in cobalt interconnect has the median-time-to-failure(MTTF) of 35.8 times that of annealed cobalt interconnect. In summary, the cobalt-graphene heterostructure has lower resistivity, higher breakdown current density and longer median time to failure of interconnects.