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請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/88157
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor莊東漢zh_TW
dc.contributor.advisorTung-Han Chuangen
dc.contributor.author李昕融zh_TW
dc.contributor.authorHsin-Jung Leeen
dc.date.accessioned2023-08-08T16:33:22Z-
dc.date.available2023-11-09-
dc.date.copyright2023-08-08-
dc.date.issued2023-
dc.date.submitted2023-07-19-
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/88157-
dc.description.abstract本研究針對SiC與Sapphire基板的晶背金屬層架構進行優化。SiC是功率元件所採用的基板,晶背金屬層的品質成為決定元件可靠度的要素之一,因此本研究針對Ti/Ni/Ag、Ti/Ni/Ag/Sn、Ti/Ni/Cu/Ag與Ti/Ni/Cu/Ag/Sn 結構進行探討,分析濺鍍與蒸鍍製程的差異。而Sapphire是LED所用的基板材料,本研究將探討銀奈米孿晶在Sapphire基板上沉積與低溫直接接合的影響。
薄膜的品質會受到原子動能影響,原子動能不足或太大可能會造成金屬層孔洞、甚或導致應力累積並導致成長突起。根據結構區域理論,提升基板溫度可以改變原子的擴散能力、施加基板偏壓與調整濺鍍功率能夠改變原子的動能甚至薄膜的應力,透過上述參數的調整可以調整金屬層與界面品質。此外,由於Ni/Cu互相固溶,因此會比不固溶的Ni/Ag界面有更好的剪力強度、提供元件更好的可靠度。蒸鍍製程因為原子動能較低,因此可以得到較為緻密平整的金屬層。
Sapphire是LED元件的基板材料,在Sapphire基板上添加反射層可以增加元件的發光效率,由於銀具有所有金屬中最高的反射率,因此常被用作反射層材料。
銀具有低疊差能,容易製作出可以提升整體反射力的孿晶,並提高元件的光析出率,加上孿晶具有低移動力、低電阻與熱穩定性,可以提供元件可靠度、增加導電能力並且抑制電遷移的特性。本研究將利用濺鍍法製備銀奈米孿晶結構,並添加Ti薄膜作為黏著層來增加材料附著度,接著將銀奈米孿晶與Au-finished DBC基板進行250℃以下的低溫直接接合。由於Ag-Au可以互相固溶,加上高溫能夠提供原子更大的移動力,因此接合界面可靠度與品質會直接受到接合溫度影響,在250℃接合時可以得到最緻密的界面與最高的剪力強度。
zh_TW
dc.description.abstractThis study focuses on optimizing the metal layer structure of SiC and Sapphire substrates. SiC is a substrate used in power devices, and the quality of the metal layer on the backside of the substrate is one of the determining factors for device reliability. Therefore, this study investigates the structures of Ti/Ni/Ag, Ti/Ni/Ag/Sn, Ti/Ni/Cu/Ag and Ti/Ni/Cu/Ag/Sn and analyzes the differences between sputtering and evaporation processes. Sapphire is a substrate material used in LEDs, and this study examines the deposition of silver nanotwinned crystals on Sapphire substrates and low-temperature direct bonding.
The quality of thin films is influenced by atomic kinetic energy. Insufficient or excessive atomic kinetic energy may result in voids in the metal layer or even lead to stress accumulation and hillock growth. According to the theory of structural zones model, increasing the substrate temperature can change the diffusion capability of atoms. Applying substrate bias and adjusting sputtering power can alter the atomic kinetic energy and even the stress of the thin film. By adjusting these parameters, the quality of the metal layer and interface can be controlled. In addition, since Ni and Cu are mutually solid soluble, the Ni/Cu interface provides better shear strength compared to the non-soluble Ni/Ag interface. Besides, the evaporation process results in a denser and smoother metal layer due to lower atomic kinetic energy.
Sapphire is a substrate material for LED devices, and adding a reflective layer on Sapphire substrates can increase the device's light-emitting efficiency. Silver has the highest reflectivity among all metals and is commonly used as a reflective layer material. Silver has low stacking fault energy, making it easy to produce nanotwinned crystals that enhance overall reflectivity and increase the light extraction efficiency of the device. Moreover, nanotwinned crystals exhibit low mobility, low resistance, and thermal stability, contributing to device reliability, improved conductivity, and suppression of electromigration. This study focuses on the preparation of silver nanotwinned crystals structures and adds a Ti thin film as an adhesive layer to enhance material adhesion. Subsequently, the silver nanotwinned films are directly bonded to Au-finished DBC substrates at temperatures below 250°C. Since Ag and Au can form a solid solution, and higher temperatures provide greater atomic mobility, the reliability and quality of the bonding interface are directly influenced by the bonding temperature. The densest interface and highest shear strength can be achieved when bonding at 250°C.
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dc.description.tableofcontents目錄
中文摘要 I
ABSTRACT II
目錄 IV
圖目錄 IX
表目錄 XIII
第一章 緒論 1
1.1 前言 1
1.2 研究目的 3
第二章 文獻探討 4
2.1 功率元件 4
2.2 寬能帶半導體 6
2.2.1 碳化矽 7
2.3 晶背金屬層 8
2.3.1 黏著層 8
2.3.2 擴散阻擋層 9
2.3.3 接合層 9
2.4 薄膜成長機制 11
2.4.1 結構區域模型 11
2.4.2 Zone 1 12
2.4.3 Zone 2 12
2.4.4 Zone 3 12
2.4.5 Zone T 13
2.4.6 陰影效應 14
2.4.7 再發射效應 14
2.4.8 成長突起 15
2.4.9 薄膜應力 16
2.5 發光二極管 18
2.5.1 運作原理 18
2.5.2 橫向LED結構 20
2.5.3 垂直LED結構 21
2.5.4 LED封裝技術 22
2.6 奈米孿晶 23
2.6.1 晶界 23
2.6.2 孿晶界 23
2.6.3 孿晶生成機制 24
2.6.4 銀奈米孿晶製備 25
2.6.5 孿晶特性 27
2.7 低溫接合 28
2.7.1 過渡液相接合 28
2.7.2 熱壓接合 28
2.7.3 表面活化接合 28
2.8 恆力破壞 30
2.8.1 恆力破壞斷面形貌 30
2.8.1.1 延性破壞 30
2.8.1.2 脆性破壞 31
2.8.1.3 準劈裂破壞 32
第三章 實驗方法 33
3.1 實驗材料 33
3.1.1 濺鍍靶材 (Sputtering target) 33
3.1.2 基板 (Substrate) 33
3.1.3 濺鍍氣體 (Gas ambient) 33
3.2 實驗設備 34
3.1.1 磁控射頻濺鍍系統 (Magnetron RF sputtering system) 34
3.2.2 電子束蒸鍍系統 ( E-beam Evaporation system) 35
3.2.3 真空熱處理系統 36
3.2.4 真空熱壓機 36
3.3 濺鍍SIC背晶金屬層實驗流程 37
3.3.1 基板準備 37
3.3.2 濺鍍背晶金屬層 37
3.4 濺鍍銀奈米孿晶實驗流程 38
3.4.1 基板準備 38
3.4.2 濺鍍背晶金屬層 38
3.4.3 低溫熱壓接合 38
3.5 分析儀器 39
3.5.1 聚焦離子束與電子束顯微系統 ( Dual beam focused ion beam ) 39
3.5.1 高功率X光繞射分析儀 40
3.5.3 場發射槍掃描式電子顯微鏡 41
3.5.4 場發射鎗穿透式電子顯微鏡 42
3.5.5 原子力顯微鏡 43
3.5.6 接點強度試驗機 44
第四章 實驗結果 45
4.1 SIC/TI/NI/AG結構 45
4.1.1 FIB 46
4.1.1.1 基板溫度對薄膜品質影響 46
4.1.1.2 基板偏壓對薄膜品質影響 48
4.1.1.3 不同製程對薄膜品質影響 50
4.1.2 XRD 51
4.1.3 EBSD 53
4.1.4 AFM 56
4.1.5 剪力測試 57
4.1.6 破斷面分析 58
4.2 濺鍍SIC/TI/NI/AG/SN 60
4.2.1 FIB 61
4.2.1.1 濺鍍功率對薄膜影響 61
4.2.1.2 基板偏壓對薄膜影響 64
4.2.1.3 不同製程對薄膜影響 65
4.2.2 XRD 66
4.2.3 AFM 68
4.2.4 剪力測試 69
4.2.5 破斷面分析 70
4.3 濺鍍SIC/TI/NI/CU/AG 71
4.3.1 FIB 72
4.3.2 EBSD 73
4.3.3 XRD 74
4.3.4 剪力測試 75
4.3.5 破斷面分析 76
4.4 濺鍍SIC/TI/NI/CU/AG/SN 78
4.4.1 FIB 79
4.4.2 XRD 80
4.4.3 AFM 81
4.4.4 剪力測試 82
4.4.5 破斷面分析 83
4.5 銀奈米孿晶材料分析 85
4.5.1 FIB 86
4.5.1.1 鈦黏著層對奈米孿晶影響 86
4.5.1.2 鈦黏著層對熱穩定性影響 88
4.5.2 XRD 89
4.5.3 EBSD 90
4.5.4 AFM 93
4.5.5 TEM 94
4.5.6 剪力測試 96
4.6 銀奈米孿晶低溫接合 97
4.6.1 FIB 98
4.6.2 剪力測試 100
4.6.3 SEM 101
第五章 結果與討論 106
參考文獻列表 108
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dc.language.isozh_TW-
dc.subject低溫接合zh_TW
dc.subject銀奈米孿晶zh_TW
dc.subject功率元件zh_TW
dc.subject電子構裝zh_TW
dc.subject晶背金屬層zh_TW
dc.subject發光二極體zh_TW
dc.subjectbackside metallizationen
dc.subjectLEDen
dc.subjectSilver nanotwinned filmen
dc.subjectPower deviceen
dc.subjectElectronic Packagingen
dc.subjectlow temperature direct bondingen
dc.titleSiC 晶背金屬層優化與銀奈米孿晶低溫接合研究zh_TW
dc.titleOptimization of SiC backside metallization layer and low-temperature bonding of silver nanotwinned filmen
dc.typeThesis-
dc.date.schoolyear111-2-
dc.description.degree碩士-
dc.contributor.oralexamcommittee林招松;劉乃瑋;蔡幸樺;王彰盟zh_TW
dc.contributor.oralexamcommitteeChao-Sung Lin;Nai-Wei Liu;Hsing-Hua Tsai;Chang-Meng Wangen
dc.subject.keyword電子構裝,晶背金屬層,功率元件,發光二極體,銀奈米孿晶,低溫接合,zh_TW
dc.subject.keywordElectronic Packaging,backside metallization,Power device,LED,Silver nanotwinned film,low temperature direct bonding,en
dc.relation.page111-
dc.identifier.doi10.6342/NTU202301643-
dc.rights.note未授權-
dc.date.accepted2023-07-19-
dc.contributor.author-college工學院-
dc.contributor.author-dept材料科學與工程學系-
顯示於系所單位:材料科學與工程學系

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