以氧化銦鎵鋅作為通道層之可撓性氧化鉿鋯鐵電薄膜電晶體之研究

Abstract

本研究主要探討可撓性鐵電電晶體在記憶體之應用。以金屬 / 鐵電材料 / 金屬 / 介電層 / 半導體( Metal - Ferroelectric - Metal - Insulator - Semiconductor, M - F - M - I - S )之結構於聚醯亞胺軟性基板( Polyimide, PI )製備鐵電電晶體( Ferroelectric Thin - Film Transistor, FeTFT )，由於PI基板其玻璃轉移溫度( Glass transition temperature, Tg )的限制，可耐受之製程溫度需控制約在400OC，故開發350OC低溫製程，並對鐵電層加入一介面層( Interface layer, IL )期望增加記憶窗口( Memory window, MW )。本研究使用Al2O3以及ZrO2兩種不同介面層，探討封裝前後對記憶窗口之影響，成功在加入介面層後使記憶窗口增加，在背通道裸露情況，其記憶窗口以ZrO2做為介面層之HZO鐵電層參數達4.3 V。待IGZO背通道經SiO2封裝後，去除外界水氣、氧氣等環境影響，並且由於300OC的封裝製程， 對於IGZO主動層以及鐵電層亦具有退火處理效果，使得三種鐵電層參數之記憶窗口皆有增加趨勢，尤其以Al2O3做為介面層之HZO鐵電層為最大，達5.8 V。除此之外，記憶窗口的增加實現多層式存儲操作( multilevle cell/code operation, MLC )，利用鐵電材料中電偶極部分翻轉特性，增加記憶密度，於multi - state VTH在無介面層及以ZrO2為介面層之鐵電電晶體達到2 bit；而以Al2O3做為介面層之鐵電電晶體則可達到3 bit。

In this work, ferroelectric thin-film transistors ( Fe - TFTs ) with metal / ferroelectric / metal / insulator / semiconductor ( M - F - M - I - S ) structure are developed by monolithically integrating HfZrO2 ( HZO ) ferroelectric capacitors with amorphous indium-gallium-zinc oxide ( a-IGZO ) TFTs on Polyimide ( PI ) substrates. Since the PI substrate can withstand temperatures only up to ~400C, a low-temperature (350C ) process is developed for the Fe – TFTs. In addition, an interlayer is introduced to enlarge the memory window (MW). Al2O3 and ZrO2 are used as the interface layer here. The MW of back-channel exposed a-IGZO TFT with an ZrO2 interface layer, reaches 4.3 V. The MWs are enlarged after the back-channel is passivated by SiO2. In particular, the MW of the a-IGZO TFT with an Al2O3 interface layer achieves 5.8 V. This can be attributed to the protection of channel against the influence of moisture and oxygen and the annealing effect during the deposition of passivation layer at 300C. The large MW can enable multilevel cell/code operation ( MLC ). The partial flipping of ferroelectric dipoles can be applied to high-density memory applications. Finally, 2 - bit operation is demonstrated in the Fe-TFT without the interface layer or with a ZrO2 interface layer, and 3 - bit operation is achieved in the Fe - TFT with an Al2O3 interface layer.