基於狀態平面分析與單邊諧振電容電壓之電流模式實現數位式LLC諧振轉換器輸出電壓時間最佳化控制

Abstract

LLC諧振轉換器基於高效率、電磁干擾低之特點被廣泛應用於計算機與工業電源應用中。然而，LLC諧振轉換器由於諧振槽動態特性，因此其動態響應不易改善，且補償器設計不易。而狀態軌跡分析能在不建立小訊號模型下分析LLC諧振轉換器之動態響應並實現控制架構；除此之外，透過偵測諧振槽資訊能夠實現LLC諧振轉換器之電流模式控制亦可有效簡化系統之複雜度並有效改善轉換器之動態響應，本文將提出輸出電壓時間最佳化控制，該控制架構使得LLC諧振轉換器能在負載變化時，相較於電流模式控制能使得諧振槽及輸出電壓皆實現快速暫態響應。 本文提出之控制架構透過偵測諧振電容電壓，並在僅使用一類比比較器下，於TMS320F28379D控制晶片實現電流模式控制。並提出針對輸出電容之電荷平衡之狀態軌跡使得LLC諧振轉換器能基於提出之電流模式控制架構實現輸出電壓時間最佳化控制。本文首先將回顧LLC諧振轉換器之狀態軌跡分析，並提出數位型電流模式控制架構，接著將針對輸出電容之電荷平衡提出狀態軌跡分析，以實現LLC諧振轉換器輸出電壓時間最佳化控制。除了PSIM模擬外，亦完成一輸入直流電壓為400V、輸出為20V，滿載操作條件為300W之LLC諧振轉換器，並由量測結果比較本文所提出之電流模式控制和加入時間最佳化控制之暫態響應，當半載切換至滿載時，電流模式控制與時間最佳化之安定時間分別為340 μs和60 μs，在加入時間最佳化控制下降低了82.3%的響應時間；當滿載切換至半載時，電流模式控制與時間最佳化之安定時間分別為365 μs和52 μs，在加入時間最佳化控制下降低了84.1%的響應時間，由量測結果可得知本文所提出之控制架構可行性。

LLC resonant converter is widely used in computer and industry power applications due to high efficiency, low EMI and high power density. However, LLC resonant converter faces the issues of slow dynamic response and difficult controller design due to the resonant tank dynamic characteristic. State trajectory analysis can analyze the dynamic response of LLC resonant converter and realize the control architecture without building a small signal model. In addition, the current mode control, which senses the resonant tank information, can effectively simplify complexity of the system and improve the dynamic response of the converter. This thesis proposes an output voltage time optimal control. This control architecture make LLC resonant converter achieve fast transient response both resonant tank and output voltage during load transition, compared to current mode control. This architecture implements current mode control on the TMS320F28379D control chip by sensing resonant capacitor voltage and using only one analog comparator. Then propose state trajectory for the charge balance of output capacitor to achieve LLC resonant converter output voltage time optimal control based on proposed current mode control. For a complete analysis of the control strategy, this thesis first will review the state trajectory analysis of LLC resonant converter and propose a digital current mode control architecture. Next, a state trajectory analysis will be proposed for the output capacitor charge balance to realize the output voltage time optimal control of the LLC resonant converter. In addition to the PSIM simulation, LLC resonant converter with an input DC voltage of 400V, output voltage of 20V and 300W at full load, then compare the transient response of proposed current mode control and time optimal control by the measurement results. When half load to full load, the settling time of current mode control and time optimal control are 340 μs and 60 μs, 82.3% response time is reduced with time optimal control. When full load to half load, the settling time of current mode control and time optimal control are 365 μs and 52 μs, 84.1% response time is reduced with time optimal control. The feasibility of the control architecture proposed in this thesis can be verified by the measurement results.