應用於腦波偵測之低雜訊負電容耦合式前端放大器

Abstract

隨著科技的進步，生醫訊號感測在臨床醫學診斷上日漸重要。以往須依賴大型儀器感測，而現今可透過整合系統單晶片，來達到更精準、更即時、更便利的生醫監控。而這些感測電路的主要任務為將振幅極小且低頻的信號放大，便於後端數位電路做訊號處理，為了維持訊號品質，需消除來自外界與電路本身的雜訊干擾，同時亦要求低功率與晶片面積以滿足可攜式需求。 本篇論文主要探討關於負阻抗技術對於雜訊抵銷的相關議題，因此本論文實作了兩個電路，使用製程皆為台積電180奈米製程。本篇論文提出創新之負電容抗雜訊補償技術，主要應用於生醫腦波偵測中，而負電容技術亦應用於系統的穩定度補償，主架構則選用電容耦合式儀表放大器以達成低功耗的訴求。晶片量測結果顯示，其在雜訊表現中有明顯的改善，在1到400赫茲的頻寬下，得到1.06微伏特(方均根)的等效輸入雜訊，整體雜訊被抑制約46%。另外，本論文也實作負電阻抗雜訊補償電路，其中加入了截波器技術，主要用以驗證與比較和負電容技術的差異。整體晶片核心面積僅0.494平方毫米。

With the evolution of technology, biomedical signal sensing is increasingly important in medical clinical diagnosis. In the past, physiological sensing had to rely on large instrument. More accurate, real-time, and convenient biomedical monitoring can be achieved with integrated SOC now. The sensing circuits are mainly used to amplify the extremely weak and low frequency signals so that the digital circuit process these signals correctly. In order to maintain signal quality, it is necessary to remove the noise interference from the outside environment and the circuit itself. For portable applications, it also requires low-power and small area performance. In this thesis, the negative impedance technology for noise cancellation is mainly discussed, and two circuits are presented. They are both fabricated in TSMC 180-nm process. An innovative low-noise negative capacitance compensation technology for neural recording applications is proposed. The negative capacitance technology is also applied to system stability compensation. The capacitively-coupled IA (CCIA) topology is employed to achieve good power efficiency. From measurement results, it shows significant improvement in noise suppression. The input-referred noise is 1.06 uVrms from 1 to 400Hz, and the overall noise reduction is about 46%. In addition, to verify and compare with negative capacitance technology, this work also implements the negative resistance circuit with chopper technique for noise compensation. The circuit core area occupies only 0.494 mm2.