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  1. NTU Theses and Dissertations Repository
  2. 工學院
  3. 材料科學與工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77315
完整後設資料紀錄
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dc.contributor.advisor陳敏璋zh_TW
dc.contributor.advisorMiin-Jang Chenen
dc.contributor.author李昶承zh_TW
dc.contributor.authorChang-Chen Leeen
dc.date.accessioned2021-07-10T21:55:32Z-
dc.date.available2024-08-01-
dc.date.copyright2019-08-12-
dc.date.issued2019-
dc.date.submitted2002-01-01-
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[30] Y. H. Do, J. S. Kwak, Y. C. Bae, K. Jung, H. Im, and J. P. Hong, "Oxygen ion drifted bipolar resistive switching behaviors in TiO2–Al electrode interfaces," Thin Solid Films, vol. 518, no. 15, pp. 4408-4411, 2010.
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77315-
dc.description.abstract本論文主要分為兩個大部分,第一部分探討電阻式憶阻器的製備與操作流程,我們藉由觀察結晶材料與非結晶材料的性質比較,發現利用結晶性材料的單層氧化物電阻式憶阻器,雖然需要較大的操作電壓,但是有較高的操作次數。為了降低操作電壓並且提升操作次數,我們額外加入電漿處理、並利用退火創造晶粒成長,大大的提升氧化物憶阻器的操作次數,以及有效利用增加氧空缺數目降低操作電壓,這也為後續發展電阻式憶阻器奠定了基礎。
本論文的第二部份注重在鐵電式憶阻器的製備與操作流程,我們藉由觀察不同底電極介面的影響,觀察並分析出可以最佳化鐵電薄膜鐵電性的介面條件,並製作超薄鐵電薄膜,並藉由後續包含XPS材料分析、UV-Vis吸收能譜並結合Simmon tunneling model理論公式,觀察鐵電穿隧接面理論與實驗數值是否一致,為後續相關的鐵電穿隧接面憶阻器特性觀察,打下良好的基礎。
zh_TW
dc.description.abstractThis thesis focuses on the synthesis and the characteristic of memristors. The thesis is divided into two main parts. Part 1 puts emphasis on the resistive switching memristors. We demonstrate that crystalline materials are more stable rather than amorphous materials. Although the operation voltage is a little higher in crystalline memristors, the endurance of crystalline memristors is much higher than the amorphous materials. To improve the unfavorable operation voltage, we develop the annealing process and plasma treatment, which effectively lower SET/RESET voltage. In addition, we design a novel structure to mitigate the depletion of oxygen vacancies. Thus, overall endurance increases to 106 cycles and shows excellent performance in multibits operation.
Part 2 focuses on the memristors based on the resistive switching in ferroelectric thin films. We first try to prepare stable ferroelectric and CMOS-compatible ultrathin film with a thickness ~3 nm. We design bottom electrode with a rough interface and a specific orientation, which has a significant impact on the ferroelectricity of thin films. Also, we analyze the potential profile of the metal-ferroelectric-metal structure by XPS and UV-Vis techniques. The current-voltage characteristics of the metal-ferroelectric-metal structure match well to the tunneling theory, indicating that ferroelectric tunneling junction is the fundamental mechanism in resistive switching in ferroelectric thin films.
en
dc.description.provenanceMade available in DSpace on 2021-07-10T21:55:32Z (GMT). No. of bitstreams: 1
ntu-108-R06527027-1.pdf: 32993394 bytes, checksum: 20eb9613196befa45f820306a5e690ca (MD5)
Previous issue date: 2019
en
dc.description.tableofcontents致謝 I
摘要 II
Abstract III
圖目錄 V
表目錄 VIII
第一章 簡介 1
1.1 原子層沉積技術(ALD) 1
1.1.1 原子層沉積技術 1
1.1.2 電漿增強原子層沉積技術 4
1.2 非揮發型記憶體憶阻器 5
1.2.1 電阻式記憶體憶阻器(Resistive Memristors) 8
1.2.2 鐵電穿隧接面(FTJ) 11
第二章 電阻式憶阻器製程與特性觀察 14
2.1 研究摘要 14
2.2 研究概論 14
2.3 研究步驟 17
2.3.1 以PEALD 成長以HfO2為主動層之電阻式憶阻器 19
2.3.2 以PEALD成長ZrO2為主動層之電阻式憶阻器 21
2.3.3 電性量測試片製作 23
2.4 實驗結果與討論 25
2.4.1 HfO2電阻式憶阻器電性分析 25
2.4.2 ZrO2電阻式憶阻器電性分析 43
2.5 結論 55
第三章 鐵電式憶阻器的製備與特性觀察 56
3.1 研究動機 56
3.2 研究簡介 56
3.3 實驗步驟 58
3.3.1 白金底電極製作 58
3.3.2 PEALD成長ZrO2薄膜 59
3.3.3 電性量測試片製作 59
3.4 實驗結果與討論 60
3.4.1 超薄鐵電薄膜鐵電性強弱比較與分析 60
3.4.2 鐵電穿隧接面電性量測 67
3.4.3 鐵電穿隧接面材料分析 69
3.5 結論 76
第四章 總結 77
第五章 參考資料 78
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dc.language.isozh_TW-
dc.subject鐵電材料zh_TW
dc.subject電阻式憶阻器zh_TW
dc.subject憶阻器zh_TW
dc.subject電漿處理zh_TW
dc.subject原子層沉積技術zh_TW
dc.subjectMemristorsen
dc.subjectAtomic Layer Depositionen
dc.subjectResistive Switchingen
dc.subjectFerroelectric Tunneling Junctionen
dc.subjectPlasma Treatmenten
dc.title先進電阻式與鐵電式憶阻器元件zh_TW
dc.titleNovel Resistive and Ferroelectric Memristorsen
dc.typeThesis-
dc.date.schoolyear107-2-
dc.description.degree碩士-
dc.contributor.oralexamcommittee李峻霣;吳肇欣;陳則安;陳佑昇zh_TW
dc.contributor.oralexamcommitteeJiun-Yun Li;Chao-Hsin Wu;;Yu-Sheng Chenen
dc.subject.keyword憶阻器,電阻式憶阻器,鐵電材料,原子層沉積技術,電漿處理,zh_TW
dc.subject.keywordAtomic Layer Deposition,Memristors,Resistive Switching,Ferroelectric Tunneling Junction,Plasma Treatment,en
dc.relation.page81-
dc.identifier.doi10.6342/NTU201902583-
dc.rights.note未授權-
dc.date.accepted2019-08-06-
dc.contributor.author-college工學院-
dc.contributor.author-dept材料科學與工程學系-
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