先進奈米電晶體中鐵負容和通道工程的原子層技術之研究

Abstract

In the sub-10nm semiconductor technology nodes, the major issue is the power consumption. Due to the challenge of extreme process conditions for the nanofabrication, the variability and stability issues for continuous transistor scaling have become a hot topic. In order to keep high performance and low power consumption, novel device schemes have been proposed, including nanowire channel stacks, the vertical transistors, negative capacitance, 2D materials, and metallic channels. All of these schemes always face the “scaling-down” problem. Atomic layer deposition (ALD) is a very promising technique for precise nanofabrication because of the layer-by-layer deposition and self-limiting mechanisms. This thesis, we mainly focus on the applications of ALD on negative capacitance transistors and TiN metallic channel to deal with the power consumption issue. In addition, with the evolution of the precise nanofabrication in sub-10nm semiconductor technology nodes etching technology is also becoming critical. In this thesis, a novel atomic layer etching (ALE) technique is proposed and developed. In the first part of this thesis, we report the experimental observations and the theoretical investigation of the inductance caused by the ferroelectric polarization switching. The time-domain non-RC response and underdamping RLC oscillation in a metal-ferroelectric-metal (MFM) structure are observed for the first time, indicating the existence of inductance in the ferroelectric layer. The ferroelectric inductance is also confirmed by the positive imaginary part in the Nyquist impedance plot. Upon careful examination of Maxwell's equations, we show that the polarization switching yields an “effective ferroelectric-induced electromotive force (emf)” which results in a decrease of the voltage drop across the ferroelectric layer. The polarity of this effective ferroelectric-induced emf opposites the polarization switching, which is similar in behavior to the Lenz’s law and so indicates that the induced emf voltage acts against the applied voltage. Therefore, the effective ferroelectric-induced emf gives rise to the inductance and negative capacitance during the polarization switching. In addition, the negative capacitance is clearly manifested by the enhancement of small-signal capacitance of a paraelectric capacitor as connected in series with a ferroelectric capacitor. This small-signal capacitance enhancement is attributed to the effect of negative capacitance induced by the net ferroelectric polarization switching. The observation of negative capacitance and inductance under small-signal modulation can be accounted for by ferroelectric multi-domains in the nanoscale ferroelectric layer, which is clearly revealed by the nano-beam electron diffraction. Finally, this ferroelectric layer is introduced into the gate stack of the nanoscale junctionless transistors to examine the large-signal operation of negative capacitance. The negative-capacitance ultrathin-body Si junctionless transistor with a subthreshold swing below 60 mV/dec operated under a large drain voltage, along with the almost hysteresis-free operation, is first demonstrated. In the second part of this thesis, room-temperature field effect and modulation of the channel resistance was achieved in the metallic channel transistors, in which the oxygen-doped TiN ultrathin-body channels were prepared by the atomic layer delta doping and deposition (AL3D) technique with precise control of the channel thickness and electron concentration. The decrease of channel thickness leads to the reduction in electron concentration and the blue shift of the absorption spectrum, which can be explained by the onset of quantum confinement effect. The increase of oxygen incorporation results in the increase of interband gap energy, also giving rise to the decrease in electron concentration and the blue shift of the absorption spectrum. Because of the significant decrease in electron concentration, the screening effect was greatly suppressed in the metallic channel. Therefore, the channel modulation by the gate electric field was achieved at room temperature due to the quantum confinement and suppressed screening effect with the thickness down to 4.8 nm and the oxygen content up to 35% in the oxygen-doped TiN ultrathin-body channel. Finally, the layer-by-layer ALE was achieved by using the combination of the ALD and HF-based wet chemical etching. The deposition of ALD oxide leads to the formation of the interfacial layer between the oxide and Si. Afterward, the HF-based solution removes the oxide and IL on the Si layer, resulting in the layer-by-layer, isotropic, self-limiting, self-stop, and damage-free ALE technique. The etching rate can be controlled accurately with a precision of Å scale per ALE cycle and a high linearity between the etching depth and the applied ALE cycles.