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Title: | 應用於V頻段之高增益次諧波降頻器與高鏡像訊號抑制之單邊帶升頻器 A High Gain Sub-Harmonic Down-Conversion Mixer and A High Image Rejection Ratio Single-Side Band Up-Conversion Mixer at V-Band |
Authors: | Chih-Yang Kang 康智揚 |
Advisor: | 盧信嘉(Hsin-Chia Lu) |
Keyword: | 次諧波混頻器,交叉耦合對,電流注射技術,補償電感,主動巴倫,單邊帶升頻器,疊接電晶體架構,多相位濾波器, sub-harmonic mixer,cross couple pair,current injection,compensated inductor,active balun,single side band,stacked transistor,polyphase filter, |
Publication Year : | 2019 |
Degree: | 碩士 |
Abstract: | 本論文主要研究V頻段射頻功率偵測系統內的次諧波降頻式混頻器與應用於生理感測雷達的單邊帶升頻式混頻器,在前半段首先會從混頻器重要的規格開始介紹,並討論各個規格好壞對系統造成的影響。接著會針對各種不同架構的混頻器做詳細的介紹。
本論文第一顆晶片為60 GHz次諧波降頻式混頻器,採用交叉耦合對電流注射技術來提升電路的轉換增益,並使用補償電感來抵消電晶體的寄生電容,使混頻器轉換增益與雜訊指數得到更進一步的改善。最後在輸出端利用主動式巴倫來將雙端輸出轉成單端輸出,並同時消除來自於本地振盪源的共模雜訊。本論文之次諧波混頻器佈局面積為685μm x 505μm、轉換增益在4.93 dB以上、輸入1 dB壓縮點為-9 dBm、隔離度在頻段內可維持在52 dB以上、雜訊指數為13 dB。 第二顆晶片是利用疊接電晶體架構來實現一個單邊帶升頻式混頻器,混頻開關採用多相位濾波器產生的四相位基頻訊號來驅動。本論文之單邊帶升頻器佈局面積為520μm x 520μm,直流功耗為10.1 mW,比起一般的正交調變器,本論文提出之單邊帶升頻器可以節省一半以上的佈局面積及功率消耗。轉換增益為-6.5 dB、輸入與輸出1 dB壓縮點為-3.73 dBm與-11.15 dBm、訊號隔離度為26 dB、邊帶遏止比為11.26 dBc。其中隔離度與邊帶遏止比的量測結果不如預期,因此本論文在最後會詳細探討造成隔離度與邊帶遏止比下降的原因,並且以電磁模擬驗證。 This thesis presents a sub-harmonic downconversionm mixer used in RF power detector system and a single-side band upconversion mixer for vital sign radar system. This thesis will first introduce some important specification of a mixer, and different mixer topologies and features. The first chip this thesis presents is a sub-harmonic downconversion mixer. In order to make the conversion gain higher, the current injection technique is used and is implemented by cross couple pair architecture. In addition, the compensated inductor is in parallel with the cross couple pair to eliminate the parasitic capacitor from the transistors to improve the conversion gain and noise figure. At last, the active balun is used to convert the differential output into single ended output and can also suppress the common mode noise from LO. The chip area is 685μmx505μm. The measured conversion gain is above 4.93 dB and IP1dB is -9 dBm. The 2LO to RF isolation is above 52 dB in the used band. The measured noise figure is 13 dB. The second chip is a single-side band (SSB) upconversion mixer, which is implemented by stacked transistor architecture. The proposed switches are driven by the four phase IF signal. The chip area is 520μmx520μm and the power dissipation is about 10 mW. Compared with other paper, This SSB mixer presented by this thesis can reduce the chip area and power dissipation by half. The measured conversion gain is -6.5 dB. IP1dB is -3.73 dBm and OP1dB is -11.15 dBm. However, the measured results of LO to RF isolation and sideband suppression ratio is worse than the simulation results. LO to RF isolation is better than 26 dB and sideband suppression ratio is only 11.26 dBc. Therefore, this thesis will carefully investigate the reason for poor measured isolation and sideband suppression of the mixer. At last, we will verify the results by EM simulation. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71529 |
DOI: | 10.6342/NTU201900077 |
Fulltext Rights: | 有償授權 |
Appears in Collections: | 電子工程學研究所 |
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ntu-108-1.pdf Restricted Access | 5.52 MB | Adobe PDF |
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