3D IC 封裝中接點空間受限誘發之界面反應關鍵效應

Abstract

近年來半導體產業的發展逐漸落後於莫爾定律的預期，透過發展3D IC技術以持續提供半導體產業發展的動能儼然成為各界共識。在眾多發展中的3D IC 封裝技術中，具微小銲料凸塊之晶片接合法是相當受到矚目的構裝方式。然而3D IC元件內之銲點尺寸非常微小，因此接點空間受限（Space confinement）所導致的界面反應特徵勢必與傳統銲點不同。本研究基於理論分析與實驗結果提出計六項因空間限制誘發之界面反應行為及其效應。第一項是3D IC接點中勢必存在大量介金屬化合物，即便採用具有Ni層之表面處理層依舊如是。第二項效應為界面反應發生時，來自對向之介金屬化合物會相互碰撞。此些原本具有不同結晶取向（Grain orientation）之晶粒於碰撞後會逐漸密合為單一晶粒。研究中推測晶粒粗化（Grain coarsening）是造成密合現象的重要因素。其三，實驗結果指出：銲料體積減少對於介金屬之種類及成長速率並沒有顯著效應。其四，銲料中之鈍態添加元素（Inert constituent）對於接點顯微結構具有顯著之影響。實驗中發現Ag與Bi等鈍態添加元素會被阻絕於接點界面反應之外。換言之，鈍態相（Inert phase）會被排出並堆積於接點中央。當使用含有較高鈍態元素濃度之銲料時，這些鈍態相甚至將於接點中央形成一連續層。此顯微組織極可能對接點強度造成不良影響。其五，當銲料體積減少時，銲料層之表-體積比（surface area-to-volume ratio）將隨之上升。此時接點表面處理層之效應將大幅提升。其中最重要的影響便是金脆效應（Au embrittlement）。實驗結果顯示當接點之Au濃度超過1.3 wt.%時，接點內將出現大量盤狀或層狀之(Au,Ni)Sn4，該顯微結構將導致接點強度劣化。第六點為界面反應誘發之接點體積收縮效應。本研究係首次以完整的實驗結果證明該效應的存在。接點中之體積收縮將可能誘發接點內應力以及結構缺陷，對接點強度將具有相當大的影響。本文中除了呈現分析結果與實驗數據外，亦將針對各效應可能衍生之可靠度議題進行探討。

Imminent ending of Moore’s law is the most critical issue threatening the continuing development of semiconductor industry. The strategy of consensus in order to go beyond Moore’s law is through the Three-Dimensional Integrated Circuit (3D IC) architecture. Among many 3D IC integration schemes under development today, solder micro-bumping is a very promising one. Due to the extremely small size of solder joints in 3D IC packages, interfacial reaction features are quite different to that in the conventional solder joints. The space confinement behaviour must be considered in the soldering reactions. In this thesis, six critical issues in soldering reactions arising from space confinement are proposed and discussed. The first issue arises from the concern that intermetallics (IMCs) may occupy a large portion of the solder joint volume. It is demonstrated that this concern is not only for Cu substrate but also for Ni under bump metallurgy which reacts very slowly with solders. The second issue relates to impingement and merging of IMC grains. When IMCs occupy a large portion of a joint, the IMC grains growing from the opposite sides of a joint will eventually impinge on each other. The grains originally with different orientations can merge into a single grain after the impingement. Grain coarsening is considered to be a key reason responsible for the merging behaviour. The third issue is about the solder volume effects on the IMC growth rate. It is demonstrated that solder volume has very little effects on the IMC species and their growth rates. The fourth issue is relating to effects of inert alloy constituents, i.e., Ag and Bi, in the space confined soldering reaction. The inert phase will be rejected from the interfacial reaction, and eventually locates near the centre of the joint as the solder is fully consumed. Experimental results also reveal that the inert phase can form as a continuous layer throughout the joint as the solder originally contains a higher inert constituent content. This morphology is considered having a great impact on the joint strength. The fifth issue arises from the fact that as size of joint becomes smaller, the surface area-to-volume ratio increases. This makes the impact of thin film layers on UBM and surface finish become ever higher. One well known example is Au. The so-called Au embrittlement issue may become relevant again in the 3D IC packaging. The upper limit of Au content for preventing Au embrittlement is estimated to be 1.3 wt.% in Sn. The last issue is the volume shrinkage during soldering reactions. It is the first time that the reaction induced volume shrinkage is experimentally measured in a Ni-Sn soldering reaction. Internal stress or structure defects may form because of this shrinkage. Theoretical analysis and experimental evidence are presented in this thesis to illustrate these issues, and implications based on the findings will be also discussed.