毫米波60-GHz關鍵元件與190-GHz放大器之研製

Abstract

本論文包含兩部分，第一部分呈現在V頻段收發機中兩個關鍵元件。一個使用TSMC先進65奈米互補式金氧半場效電晶體製程之60 GHz頻段下的雙平衡吉爾伯特單元降頻混波器，達到約1 dB的轉換增益，這個混頻器使用了寬頻的馬遜式平衡與不平衡轉換器以及一個RC迴授中頻放大器使節省VDD的電壓頭部空間。另一個元件為60 GHz頻段下的低相位變化的可變增益放大器，同樣使用TSMC先進65奈米互補式金氧半場效電晶體製程。利用電流控制架構(Current-Steering)與分割式疊接電晶體(Splitting-Cascode)相反的相位趨勢來達到相位的補償，這個低相位變化的可變增益放大器在31 dB的增益可調範圍下相位變化小於 ，3-dB頻寬為50至70 GHz而最高的增益為21 dB。 第二部分呈現一個使用增益提高(Gain-Boosted)技術與疊接電晶體組態(Cascode)之190 GHz金氧互補式半導體單晶微波積體電路放大器，這個放大器利用增益提高(Gain-Boosted)技術將在190 GHz的最大穩定增益(Maximum Stable Gain, MSG)提高。這個放大器的晶片面積為0.73 × 0.63 mm2使用TSMC標準RF 65奈米互補式金氧半場效電晶體製程，3-dB頻寬為188至192 GHz而最高的增益為16.3 dB。

This thesis includes two parts. The first part presents two important components in V-band transceiver. A 57-66 GHz double-balanced Gilbert-cell down conversion mixer implemented in TSMC 65-nm CMOS process, achieving about 1 dB conversion gain. It utilizes the broadband marchand-type-balun with a RC feedback IF amplifier to save the headroom voltage of VDD. Another component is a 57-66 GHz low phase variation variable gain amplifier also in TSMC 65-nm CMOS process. The phase compensation is achieved by using the different trends of phase between current-steering and splitting-cascade topology. This variable gain amplifier has a phase variation lower than with 31 dB gain control range. The 3-dB bandwidth is from 50 to 70 GHz with peak gain of 21 dB. In the second part, a 190-GHz CMOS MMIC amplifier with cascode and gain-boosted techniques is presented. The amplifier utilizes gain-boosted technique to enhance the maximum stable gain (MSG) at 200 GHz. This amplifier is fabricated in standard RF 65-nm CMOS process with chip area of 0.73 × 0.63 mm2. The 3-dB bandwidth is from 188 to 192 GHz with 16.3 dB peak gain.