K頻段互補式金氧半導體功率放大器之自動調整偏壓技術研究

Abstract

這篇論文題出一個可以使用在K頻段的自動調整偏壓技術，它可以改善互補式金氧半導體功率放大器在小於1-dB壓縮點時的效率。這個自動調整偏壓電路使用一個N型金氧半導體電晶體當作一個會隨著輸入功率而自動可變的電阻，並藉此可變電阻來控制共源級放大器的閘極偏壓。文中分析了此電路的操作原理及細節，並與已發表的其他自動調整偏壓技術做比較。也分析此自動調整偏壓電路的特性來對功率放大器做最佳化的設計。此外，它的使用限制及可調範圍也在此論文中提及。 我們使用180奈米互補式金氧半導體來製作一個使用自動調整偏壓技術在K頻段的兩級放大器。量測的結果，此功率放大器在靜態只有58.6毫瓦的功耗，而在1-dB壓縮點前6 dB的操作點有8.7%的功率附加效率。並且，其具有9 dB的小訊號增益、15.8 dBm的飽和輸出功率以及在1 dB 壓縮點有13.9 dBm的輸出功率和14%的功率附加效率。這是在所有發表過的電路中，使用180奈米互補式金氧半導體製程在1-dB壓縮點前6 dB的操作點有最高附加效率的K頻段功率放大器。

In this thesis, a new adaptive-bias technique is proposed to enhance the back-off efficiency of the K-band CMOS power amplifiers. This technique uses a transistor to be a variable resistor which is automatically adjusted by the input power. The operation detail of the adaptive-bias circuit is investigated, and the comparison of this new technique and the other previously reported adaptive-bias techniques is provided. The characteristics of the adaptive-bias circuit are analyzed and are optimized for the performance of power amplifiers. Besides, the limitation and the adjustable range of this adaptive-bias technique are also mentioned in the analysis. A K-band power amplifier with the proposed adaptive-bias technique is fabricated in 0.18-um CMOS technology. According to the measurement, the proposed PA only consumes 58.6 mW at quiescent state and has 8.7% at the power of 6-dB back-off from P1dB. Compared with the fixed-bias Class-A PA that consumes 90 mW at quiescent state, the proposed PA saves 35% power consumption. The power-added-efficiency at OP1dB is 14% while maintaining 9-dB small-signal gain, 13.9-dBm OP1dB and 15.8-dBm Psat. It is the highest efficiency at the power of 6-dB back-off from P1dB among the reported 0.18-um CMOS power amplifiers above 20 GHz.