應用於24 秭赫調頻連續波雷達系統之關鍵零組件之設計

Abstract

在本篇論文中，我們提出了幾個應用於24 GHz調頻連續波雷達系統的射頻零組件利用標準TSMC 0.18 μm CMOS製程設計，設計了一個低直流功率消耗低雜訊放大器(LNA)和兩個低直流功率消耗主動式循環器(activequasi-circulator)。 我們利用了直流電流再利用的技巧去減少了低雜訊放大器(LNA)得直流功率消耗，這個低雜訊放大器(LNA)晶片可以達到峰值增益15.8 dB和雜訊指數3.2 dB，直流供應電壓和電流分別是0.7伏特和3.8毫安培，輸入和輸出返回損失均可達到10 dB以上，IIP3為-10 dBm，晶片面積為0.69mm×0.55mm。 循環器是一個三埠不交互的零組件，應用於微波和毫米波系統用來分隔每個通道的電磁波訊號使其不互相干擾，主動式的循環器可以有較小的insertion loss、較小的面積並且可以非常容易的和其他零組件整合再一起，在本論文裡提出了兩個主動式循環器。 設計一的insertion loss從功率放大器(PA)到天線(antenna)和天線(antenna)到低雜訊放大器(LNA)分別是-3.2 dB和-3.9 dB，從功率放大器(PA)到低雜訊放大器(LNA)的isolation為-36 dB，直流功率消耗為8.4毫瓦，晶片面積為0.89mm×0.52mm。 設計二的insertion loss從功率放大器(PA)到天線(antenna)和天線(antenna)到低雜訊放大器(LNA)分別是-1.2 dB和-4.2 dB，從功率放大器(PA)到低雜訊放大器(LNA)的isolation為-31 dB，直流功率消耗為11.8毫瓦，晶片面積為0.52mm×0.64mm。

This thesis proposes several RF component application for K-band frequency-modulation continuous-wave (FMCW) radar system in 0.18 μm CMOS process. Design one low power consumption LNA and two low power consumption active quasi-circulator at 24 GHz. The power consumption of LNA is reduce by use body bias technique. This LNA chip achieves a peak gain of 15.8 dB and a noise figure of 3.2 dB at 24 GHz. The supply voltage and supply current are 0.7 V and 3.8 mA, respectively. The input and output return loss are lower than −10 dB. The input third-order intercept point IIP3 is −11 dBm. The chip size is 0.69 mm × 0.55 mm. Circulators are basic three-port nonreciprocal module used in microwave and millimeter systems to separate electromagnetic signals in different paths. Active circlulator have low insertion loss, small size, and can easily integrated with other modules. In this thesis proposes two active quasi-circulator In the design 1, the insertion loss in the PA - antenna path is −3.2 dB, and that in the antenna - LNA path is −3.9 dB. The isolation between the LNA and PA ports is −36 dB, and the dc power consumption is 8.4 mW. The chip size is 0.89mm × 0.52 mm. In the design 2, the insertion loss in the PA - antenna path is −1.2 dB, and that in the antenna - LNA path is −4.2 dB. The isolation between the LNA and PA ports is −31 dB, and the dc power consumption is 11.8 mW. The chip size is 0.52 mm × 0.64 mm.