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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 盧信嘉 | |
dc.contributor.author | Heng-Jui Hsing | en |
dc.contributor.author | 邢恆瑞 | zh_TW |
dc.date.accessioned | 2021-06-15T02:46:14Z | - |
dc.date.available | 2009-08-13 | |
dc.date.copyright | 2009-08-13 | |
dc.date.issued | 2009 | |
dc.date.submitted | 2009-08-07 | |
dc.identifier.citation | [1] Lap Kun Yeung and Ke-Li Wu, “A compact second-order LTCC bandpass filter with two finite transmission zeros,” IEEE Transactions on Microwave Theory and Techniques, vol. 51, no. 2, pp. 337–341, Feb. 2003.
[2] Peter Hagn, Andreas Przadka, Volker Gebhardt, and Ulrich Bauernschmitt, “Ceramics: the platform for duplexers and frontend-modules,” Proceedings of 2002 IEEE Ultrasonics Symposium, vol. 1, Oct. 2002. pp. 1–10. [3] J. W. Sheen, “LTCC-MLC duplexer for DCS-1800,” IEEE Transactions on Microwave Theory and Techniques, vol. 47, pp. 1883–1890, Sep. 1999. [4] Hsin-Chia Lu, Kuan-Cheng Tseng and Yung-Shuen Chang, “Schematic extraction from layout of microwave multi-layer circuits,” 2008 Asia Pacific Microwave Conference APMC , Hong Kong/Macau, China, Dec. 2008 [5] Tuck Boon Chan, Hsin-Chia Lu, Jun-Kuei Zeng and Charlie Chung-Ping Chen, “LTCC spiral inductor modeling, synthesis, and optimization,” 12th Asia and South Pacific Design Automation Conference ASP-DAC 2008, Jan. 2008. pp. 768–781. [6] Corneil, D. G., and D. G. Kirkpatrick, 'A theoretical analysis of various heuristics for the graph isomorphism problem,' SIAM Journal on Computing, vol. 9, no. 2, pp. 281–297, May 1980. [7] Read, R. C., and D. G. Corneil, 'The graph isomorphism disease,' Journal of Graph Theory, vol. 1, pp. 339–363, 1977. [8] Bryan T. Preas, Michael J. Lorenzetti and Bryan D. Ackland, Physical Design Automation of VLSI Systems, California: Benjamin/Cummings, 1988. [9] E. Barke, 'A network comparison algorithm for layout verification of integrated circuits', IEEE Transactions on Computer-Aided Design, vol. 3, no. 2, pp. 135–141, Apr. 1984. [10] Jia-Ming Chang, “The back-end of layout vs. schematic checker for microwave multi-layer circuits: mapping schematic,” Master Thesis, Graduate Institute of Electronics Engineering, National Taiwan University, Jan. 2008. [11] Albert Sutono, Joy Laskar, and W. R. Smith, “Design of miniature multilayer on-package integrated image-reject filters,” IEEE Transactions on Microwave Theory and Techniques, vol. 51, no. 1, pp. 156–162, Jan. 2003. [12] Chien-Wei Huang, “Differential bandpass filters for WLAN and antenna switch module for GPRS applications using LTCC process,” Master Thesis, Graduate Institute of Electronics Engineering, National Taiwan University, Jul. 2006. [13] David M. Pozar, Microwave Engineering 3/ed. Hoboken, New Jersey: John Wiley & Sons Incorporation, 2004. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44232 | - |
dc.description.abstract | 本篇論文提出了一種演算法來比對微波多層被動電路中電路圖網路表和佈局圖網路表的差異。根據節點相鄰的電感值和電容值來給予每個節點一個權重,再根據權重點進行節點配對。由於微波電路中元件的排列具有對稱性,可能會找到很多種可能性的配對,所以我們提出了一個評分的策略來找出最相似的配對組合。此演算法可比對電路圖網路表和從佈局圖萃取出來的網路表來幫助使用者驗證佈局圖,也可以指出在佈局圖網路表中缺少或是額外多出的元件來幫助使用者快速找到錯誤。 | zh_TW |
dc.description.abstract | This paper presents an algorithm that can compare the net-lists between schematic and layout of passive microwave multi-layer circuits. Weight vectors that are related to inductance and capacitance of devices connected to a node are defined for node mapping. However, due to the symmetry of microwave circuits, many possible mapping may be found. We then developed a scoring policy to find the most similar mapping. This checker can help designers to verify layout by comparing the net-list from designer’s schematic and layout extracted net-list. This algorithm can also provide missing and extra components in net-list to assist designer to allocate layout errors quickly. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T02:46:14Z (GMT). No. of bitstreams: 1 ntu-98-R96943108-1.pdf: 5042155 bytes, checksum: 27d8eb4e98c11a17736caf937ad77b4a (MD5) Previous issue date: 2009 | en |
dc.description.tableofcontents | 第 1 章 簡介 1
1.1 動機 1 1.1.1 一個微波多層電路的例子 1 1.2 低溫共燒多層陶瓷(LTCC)技術介紹 4 1.2.2 低溫共燒多層陶瓷技術的優點 5 1.2.3 低溫共燒多層陶瓷技術的缺點 5 1.3 佈局圖對電路圖檢查的前段作業 5 1.4 論文貢獻 9 1.5 各章節簡介 9 第 2 章 先前的研究 10 2.1 圖形同構(isomorphism) 10 2.2 電晶體層之比對 11 2.3 微波多層電路之比對 19 第 3 章 元件比對 22 3.1 網路表格式 22 3.2 移除寄生元件 23 3.2.1 移除寄生電容 23 3.2.2 移除寄生電感 25 3.3 合併元件 26 3.3.1 合併串聯元件 26 3.3.2 合併並聯元件 26 3.4 節點的權重策略 27 3.5 元件群組配對 28 3.5.1 群組配對 28 3.5.2 群組內單一元件配對 29 3.6 計算衝突群組 30 3.7 全體單一元件配對 32 3.8 評分策略 32 3.9 互感比對及判斷相異元件 35 3.10 判斷元件之間相異連接性 36 3.11 總結 36 第 4 章 幾個電路的比對結果 38 4.1 5.25 GHz帶通濾波器(bandpass filter) 38 4.2 2.4 GHz鏡像抑制濾波器(image-reject filter) 48 4.3 2.4 GHz低通濾波器(lowpass filter) 52 第 5 章 結論 56 參考文獻 57 附錄A 程式介面 59 | |
dc.language.iso | zh-TW | |
dc.title | 微波多層被動電路之佈局對電路檢查的後段:使用權重之電路比對 | zh_TW |
dc.title | The back-end of layout vs. schematic checker for passive multilayer microwave circuit: schematic mapping using weights | en |
dc.type | Thesis | |
dc.date.schoolyear | 97-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 陳中平,李建模,江介宏 | |
dc.subject.keyword | 佈局圖,網路表,佈局圖對電路圖檢查, | zh_TW |
dc.subject.keyword | Layout,net-list,LVS, | en |
dc.relation.page | 62 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2009-08-10 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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