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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 盧信嘉(Hsin-chia Lu) | |
dc.contributor.author | Guan-Ming Wu | en |
dc.contributor.author | 吳冠明 | zh_TW |
dc.date.accessioned | 2021-06-15T00:49:45Z | - |
dc.date.available | 2009-09-02 | |
dc.date.copyright | 2008-09-02 | |
dc.date.issued | 2008 | |
dc.date.submitted | 2008-08-18 | |
dc.identifier.citation | [1] International Technology Roadmap for Semiconductors 2007 Edition Assembly and Packaging, http://www.itrs.net/Links/2007ITRS/Home2007.htm
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Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Shen, and Clair Webb, “Die Stacking (3D) Microarchitecture,” IEEE/ACM International Symposium on Microarchitecture, Annual, December 2006, pp. 469-479. [7] James A. Burns, Brian F. Aull, Chenson K. Chen, Chang-Lee Chen, Craig L. Keast, Jeffrey M. Knecht, Vyshnavi Suntharalingam, Keith Warner, Peter W.Wyatt, and Donna-Ruth W. Yost, “A Wafer-scale 3-D Circuit Integration Technology,” IEEE Transactions on Electron Devices, Vol. 53, Issue 10, pp. 2507-2516. October 2006. [8] S. Denda, “Process Examination of Through Silicon Via Technologies,” International Conference on Polymers and Adhesives in Microlelctronics and Photonics, January 2007, pp. 149-152. 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[15] Behzad Razavi, Design of Integrated Circuits for Optical Communications, New York: MC Graw Hill, 2003. [16] Noriyuki Miura, Daisuke Mizoguchi, Takayasu Sakurai, and Tadahiro Kuroda, “Analysis and Design of Inductive Coupling and Transceiver Circuit for Inductive Inter-Chip Wireless Superconnect,” IEEE Journal of Solid State Circuits, Vol. 40, Issue 4, pp. 829-837, April 2005. [17] Noriyuki Miura, Daisuke Mizoguchi, Mari Inoue, Kiichi Niitsu, Yoshihiro Nakagawa, Masamoto Tago, Muneo Fukaishi, Takayasu Sakurai, and Tadahiro Kuroda, “A 1Tb/s 3W inductive-coupling transceiver for 3D-stack inter-chip clock and data link,” IEEE Journal of Solid State Circuits, Vol. 42, Issue 1, pp. 111-122, January 2007. [18] David M. Pozar, Microwave Engineering, 3rd Edition, New Jersey: John Wiley & Sons, 2005. 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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42155 | - |
dc.description.abstract | 本論文提出一個使用了耦合電感濾波器於三維積體電路的晶片間連接。跟電容耦合相比,電感耦合的連接有比較好的通訊距離且可達到30微米的距離,較長的通訊距離意味著有較能抵抗製程上對不準的現象。我們使用振幅偏移調變技術來達到信號完整的傳送。發射器包含鎖相迴路做為本地震盪器並使用電晶體開關做為被動混波器,接收器則包含了整流器來解調訊號並使用限制器放大訊號。本連接方法操作在3.5Gbps時能達到6.77pJ/bit能量效率。此無線連接使用台灣積體電路公司0.18微米製程來驗證此電路架構。 | zh_TW |
dc.description.abstract | A wireless interconnect for 3D-IC applications is implemented by using coupled inductor filter design. Inductive coupling interconnect has longer communication distance to 30μm as compared with capacitive interconnect. The longer distance means that it can resist the alignment mismatches and increase the yields for packaging. We use ASK modulation technique to transmit the data. In transmitter, a PLL is used as the local oscillator, and switches are used as passive mixer. In receiver, rectifiers are used to demodulate received signal, and cascaded limiters amplify the signal. This method has energy efficiency to 6.77pJ/bit at 3.5Gbps. The proposed wireless interconnect is implemented in TSMC 0.18μm process for demonstration of this architecture. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T00:49:45Z (GMT). No. of bitstreams: 1 ntu-97-R95943097-1.pdf: 6483610 bytes, checksum: 1d7b5187420af386fffc102fa0bb1f98 (MD5) Previous issue date: 2008 | en |
dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 1 1.2 What is 3D-IC? 3 1.2.1 Package stacking 3 1.2.2 Die stacking 4 1.2.3 Wafer stacking 5 1.3 Previous art of vertical interconnect 6 1.3.1 3D via or Through Silicon Via (TSV) 6 1.3.2 Wirelessly capacitive coupling 7 1.3.3 Wirelessly inductive coupling 7 1.4 Overview 8 Chapter 2 Current wirelessly vertical interconnect 11 2.1 Introduction 11 2.2 Capacitive and inductive coupling interconnect 11 2.3 Modulation-free and modulation interconnect 14 2.3.1 DSB and SSB modulation 14 2.3.2 Amplitude modulation and angle modulation 18 2.3.3 Digital modulation 18 2.4 Previous art of wireless interconnects 22 2.4.1 Baseband transmission 22 2.4.2 ASK modulation transmission 25 Chapter 3 Proposed wireless interconnect 27 3.1 Inductive coupling interconnect with ASK modulation 27 3.2 Design of the channel 29 3.2.1 Design principles 30 3.2.2 Implementation of differential filter 35 3.3 Transmitter and receiver circuits 39 3.3.1 The transmitter circuit 39 3.3.1.1 Transmitter buffer 39 3.3.1.2 Local oscillator 40 3.3.1.3 Switches 47 3.3.2 The receiver circuits 48 3.3.2.1 Rectifiers 49 3.3.2.2 Limiters 50 3.3.2.3 AC coupled amplifier 51 3.3.2.4 Receiver buffer 52 3.4 Layout view 52 Chapter 4 Performance considerations and simulation results 55 4.1 Jitters and eye diagram 55 4.2 Measurement setup 61 4.3 Simulation results 62 Chapter 5 Conclusion 67 Reference 71 | |
dc.language.iso | en | |
dc.title | 應用於3D-IC並使用垂直耦合電感之晶片間的無線連接 | zh_TW |
dc.title | Wireless inter-chip signal interconnect using vertical coupled inductors for 3D-IC applications | en |
dc.type | Thesis | |
dc.date.schoolyear | 96-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 盧奕璋(Yi-Chang Lu),李致毅(Jri Lee),陳怡然(Yi-Jan Emery Chen) | |
dc.subject.keyword | 三維積體電路,耦合電感,振幅偏移調調變,鎖相迴路,被動混波器,整流器, | zh_TW |
dc.subject.keyword | 3D-IC,coupled inductor,ASK modulation,PLL,passive mixer,rectifier, | en |
dc.relation.page | 73 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2008-08-18 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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