請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41906
標題: | 近橫向電磁合成傳輸線CMOS收發機設計及其在調頻連續波雷達系統之實現 Design of Synthetic Quasi-TEM Transmission-Line-Based CMOS Transceiver for Implementation of FMCW Radar System |
作者: | Sen Wang 王紳 |
指導教授: | 莊晴光 |
關鍵字: | 雷達,單晶片收發器,傳輸線, Radar,CMOS,Transmission Line, |
出版年 : | 2009 |
學位: | 博士 |
摘要: | 本篇論文係研究調頻連續波的雷達系統分析與利用標準0.18微米互補金氧半導體製程(CMOS),設計在X頻段的調頻連續波收發機。利用所提出的互補式金屬傳輸線(CCS TL),設計在射頻電路上佔絕大部分面積的被動元件,進而實現單晶片的收發機。此互補式金屬傳輸線的曲折繞線佈局,不但可達到電路的微小化,還能同時在矽基板上維持好的隔離度。首先,會探討調頻連續波系統的概要與它的調變方法。此外,在ADS模擬軟體上,亦建立調頻連續波系統的行為模型,做整個系統模擬。且提出一個應用在調頻連續波系統中的鎖相迴路架構。在這個系統模擬中,會將系統參數的功能與關系特徵化,而能提供給設計者做為系統設計的評估與參考。
其次,第三章與第四章會分別提出以互補式金屬傳輸線為基礎的被動元件與主動電路設計。利用互補式金屬傳輸線的曲折繞線佈局,來實現這些在射頻電路上佔絕大部分面積的傳輸線與電感。這些微小化的90度耦合器與180度耦合器,分別只有傳統耦合器面積的5 %與2 %。之後,介紹一個具有調頻的壓控振盪器,這個調變頻寬可達到400 MHz,而能改善雷達系統的距離解析度。最後,利用互補式金屬傳輸線來分別實現主動濾波器的共振器,單刀雙擲開關與放大器的匹配電路,以達到電路的微小化。而且,這個主動濾波器僅需要4.5毫瓦,就能在通帶沒有輸入損耗。 第三,第五章提出在矽基板上耦合現象的電磁模型。此電磁模型利用場論分析,而得到此電磁耦合的定量評估,進而設計CMOS的調頻連續波收發機。而在互補式金屬傳輸線實現的晶片上的電磁耦合抑制效能,也能用此模型來驗証。這個模型的模擬值與實驗值所得到的隔離度,誤差只有2.6 dB。 最後,利用標準0.18微米互補金氧半導體製程與以互補式金屬傳輸線為基礎的元件與電路,在X頻段設計兩個單晶片的調頻連續波收發器。第一個設計是傳統的調頻連續波收發機,此收發機亦與天線、數位電路做整合。這個系統整合的雷達偵測功能也經由實驗得到驗證。第二個設計是第六章所提出的單脈衝式調頻連續波收發機。這個整合16個電路,具有單脈衝與正交相位功能的收發機,其面積僅有2.6 mm x 3.3 mm。整個收發機的功率消耗為0.35瓦。發射機的輸出功率為1 dBm且有35 dB的二次諧波抑制。再來,在這個微型化的收發機中,發射機與接收機之間的隔離度優於60 dB。而接收機所量測的gain與NF分別為-4.5 dB與11.5 dB。最後,量測的正交相位訊號,僅有0.6 dB的振幅不平衡與7度的相位不平衡。這也是世界第一個利用0.18微米CMOS製程,實現單脈衝式的調頻連續波收發機。 This dissertation focuses on the analysis of a frequency-modulation continuous-wave (FMCW) system and the design of X-band FMCW transceiver in a standard 0.18-um CMOS technology. The single-chip transceivers are implemented by the presented complementary-conducting-strip transmission line (CCS TL) to miniaturize passive components which consume most chip area of RF circuits. The meandered CCS TL demonstrates its capability of miniaturization while maintains good isolation on the silicon substrate. Firstly, an overview of FMCW systems and modulation methods are discussed. Moreover, behavior models of the FMCW system are built in AgilentTM ADS simulator for system-level simulations. The proposed PLL-based architecture for FMCW applications is also investigated. The functions and relations among system parameters can be characterized from the simulations which provide designers with the system evaluation. Secondly, the CCS TL-based passive components and active circuits are presented in chapter 3 and chapter 4, respectively. The area-consuming TLs and inductors of the RFICs are implemented by the meandered CCS TLs. The miniaturized designs such as the 90° hybrid and the rat-race hybrid demonstrate 95 % and 98 % size reduction compared to the prototype designs, respectively. Moreover, the VCO with frequency-modulation capability is investigated, and the modulation bandwidth is up to 400 MHz which could improve the range resolution in a radar system. Finally, the active BPF, SPDT switch and amplifiers realized by meandered CCS TLs implemented for miniaturization of resonators and matching networks, respectively. The active BPF achieves 0-dB passband loss with 4.5-mW power. Thirdly, an electromagnetic (EM) model is proposed for investigating the couplings on the silicon substrate in chapter 5. Such EM model, which invokes the large-scale field analyses, can make a quantitative assessment of the EM couplings and can be applied into the system simulations for designing the CMOS FMCW transceiver. Furthermore, the model is applied to validate the effectiveness of the chip-scale leakage suppression by incorporating the CCS TL. The system simulations, which are performed with the proposed EM model, compared with those of the experimental results, showing a slight difference of 2.6 dB on the prediction of the isolation improvement. Finally, two X-band CMOS single-chip transceivers are implemented in a standard 0.18-um CMOS technology, which incorporate the CCS TL-based components and circuits mentioned above. The first transceiver is for conventional FMCW radar applications. This transceiver, antennas and digital circuitry are integrated into a radar sensor. Moreover, the functionality of the radar sensor is verified experimentally. The second transceiver characterized in chapter 6, is developed for monopulse FMCW radar applications. The monopulse and quadrature transceiver integrates 16 building blocks with a chip area of 2.6 mm x 3.3 mm. The total power consumption of the transceiver is 0.35 W. The output power of the transmitter is 1 dBm with a 35-dB 2nd harmonic suppression. Moreover, the on-chip isolations between T/R in this compact transceiver are more than 60 dB. The measured receiver gain and NF are -4.5 dB and 11.5 dB, respectively. Finally, the obtained I/Q signals demonstrate 0.6-dB amplitude imbalance and 7° phase imbalance. This chip is also the first 0.18-μm CMOS transceiver for monopulse FMCW radar applications in the world. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41906 |
全文授權: | 有償授權 |
顯示於系所單位: | 電信工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-98-1.pdf 目前未授權公開取用 | 6.57 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。