Please use this identifier to cite or link to this item:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38756
Title: | 可調整式之快閃記憶體管理系統 Configurable NAND Flash Translation Layer |
Authors: | Yi-Lin Tsai 蔡易霖 |
Advisor: | 郭大維(Tei-Wei Kuo) |
Keyword: | 快閃記憶體,管理系統,可調整, flash memory,Flash Translation Layer,configurable, |
Publication Year : | 2005 |
Degree: | 碩士 |
Abstract: | 快閃記憶體目前被廣範的使用在許多消費性產品之中,尤其是嵌入式系統之中。在產業界中,對於硬體資源的消耗量及系統效率有很嚴格的限制要求,各家廠商都在尋求一套有效率的位址轉換機制,該機制的主要功能是將檔案系統所使用的「邏輯區塊位址」轉換成快閃記憶體上的實體位址。透過這樣的轉換機制,我們便可得知每筆資料實際上存放在快閃記憶體的那個位置,如此,檔案系統便不需考慮快閃記憶體與一般硬碟間的差異。這篇論文提出一個可調整式的位址轉換機制,其可以依各家廠商的需求,在主記憶體的消耗量與系統效率之間做適當的調整。我們也做了一些實驗,針對不同的參數調變,測量其對系統有何影響,並比較我們提出的機制與目前常用的機制在主記憶體消耗量與系統效率上的表現。 Flash memory is widely adopted in various consumer products for information storage, especially for embedded systems. With strong demands on product designs for verhead control and performance requirements, vendors must have an effective design for the mapping of LBA's and physical addresses of data over flash memory. This paper targets such an essential issue by proposing a configurable mapping method that could trade the main memory overheads with the system performance under the best needs of vendors. A series of experiments is conducted to provide insights on different configurations and the proposed method, compared to existing implementations. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38756 |
Fulltext Rights: | 有償授權 |
Appears in Collections: | 資訊工程學系 |
Files in This Item:
File | Size | Format | |
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ntu-94-1.pdf Restricted Access | 614.61 kB | Adobe PDF |
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