CMOS主動電感於單磊晶微波積體電路極小化之應用與實現

Abstract

隨著無線網路裝置的需求增加，低成本及高整合性是射頻前端系統實現的一種趨勢。由於深次微米製程技術的進展，CMOS 製程更廣泛地應用在高效能低成本的射頻積體電路的設計中。但在微波頻段的類比相位轉換電路以及功率分波器的應用中,因為傳輸線的大量使用,不利於整合在單一晶片中,導致了訊號強度的不平均以及相位誤差。爲縮小面積,利用被動元件模型取代傳輸線的方式常被應用於微波分散電路的設計中。卻因CMOS製程中缺乏高Ｑ值被動元件,而產生極大的訊號損失及非理想效應。在本論文中,採用高Ｑ值的主動電感來取代螺旋電感，而達到減少訊號損失及縮小面積的目的。在0.18-um CMOS製程下實現類比相位轉換電路，Wilkinson 功率分波器，及90度相位偶合器微波積體電路。 此類比相位轉換器電路設計，主要是利用主動電感取代傳輸線，使其具有較大的相位調整範圍、低損益及小面積的優點。經由Ｓ參數的量測,在3.5GHz-4.5GHz的頻段中，可有360度的相位控制範圍,同時S21皆小於1.1dB且S11小於-10dB。由於不需使用分散式元件和螺旋電感，其晶片面積僅 400x200 um2. 在標準CMOS 製程下製作的4.5 GHz的 Wilkinson功率分波器，在16.7mW的直流功率下，其S參數量測值如下: S21=3.16dB，S31=3.3dB， S11、S23、S22、S33 <-15dB。晶片面積(不含Pad)為150x100 um2，極適合於單磊晶微波系統整合的應用。 此外，4.4GHz的90度相位偶合器的設計同樣能達到極小的面積及低損益的特性。晶片面積為640x720 um2。於 25.2 mW 的功率消耗下，其損益為0.23dB，並且保持良好的反射損失及各端間的阻絕。

With the increasing demands on wireless communication devices, the issues of the low-cost and high-level integration are the trend for the implementation of RF front-end system. With recent advances in deep submicron fabrication process, CMOS technology is showing the potential to meet these requirements. Due to the use of transmission lines, it is not practical to integrate the microwave hybrids and phase shifters monolithically. Therefore, the lumped-element replacement has been proposed to reduce the chip size. Though the minimized chip size can be achieved, they still suffer from the loss due to low Q-factor passive components in standard CMOS process. In this thesis, active inductors are employed to substitute the spiral inductors, providing high Q-factors, tunable inductance and miniaturized chip area. Based on this concept, the analog phase shifter, Wilkinson power divider and quadrature hybrid are implemented in the standard 0.18-um CMOS process for monolithic microwave integrated circuit (MMIC) applications. By employing active inductors in the synthetic transmission line architecture, the phase shifter exhibits a wide phase control range, low insertion loss and miniaturized chip area. Characterized by the S-parameter measurement, the fabricated circuit demonstrates an insertion loss less than 1.1 dB within the 360 phase shift while maintaining a return loss better than 10 dB from 3.5 to 4.5 GHz. Due to the absence of distributed elements and spiral inductors, the area of the phase shifter core is 400x200 um2. The power divider is designed at a center frequency of 4.5 GHz for equal power dividing with all ports matched to 50 ohm. Drawing a dc current of 9.3 mA from a 1.8-V supply voltage, the fabricated circuit exhibits an insertion loss less than 0.16 dB and a return loss better than 30 dB at the center frequency while maintaining good isolation between the output ports. The active area of the miniaturized Wilkinson power divider is 150x100 um2, which is suitable for system integration in monolithic microwave integrated circuit (MMIC) applications. For the design of a 4.4-GHz coupler, the total chip area including the pad frame is 640x720 um2, while the active area only occupies 400x200 um2. Consuming a dc power of 25.2 mW from a 1.8-V supply voltage, the fabricated circuit exhibits an insertion loss of 0.23 dB while maintaining good return loss and port isolation at the center frequency.