IEEE 802.11b/g 整合調變式偏壓電路之高效率CMOS功率放大器

Abstract

本論文探討以UMC CMOS 0.18um RF製程來實現Doherty PA電路架構，以提高6dB-backoff 時的功率輸出效率。經由S參數的量測，在2.4GHz的頻段中，有10.6dB的小訊號增益。該電路的最大輸出功率與P1dB分別為22.6dB與21.4dBm。此時PAE最高可達33.6%，於P1dB點為32.6%，在6dB-backoff時仍高達21.1%的高效率值。由於晶片內部不需採用螺旋電感，其晶片面積僅666*999 µm2。

The Doherty power amplifier using UMC CMOS 0.18um is designed at a frequency of 2.4 GHz. Characterized by the S-parameter measurement, the S21 is 10.6dB. The maximum output power and P1dB can achieve 22.6dB and 21.4dBm, respectively. The maximum PAE is 33.6% and the PAE is 32.6% at P1dB. At 6dB back-off from P1dB, the achieved PAE is 21.1%. Without using on-chip spiral inductors, the area of the PA is only 666*999 µm2.