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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳怡然(Yi-Jan Emery Chen) | |
| dc.contributor.author | Zhi-Yuan Liu | en |
| dc.contributor.author | 劉致元 | zh_TW |
| dc.date.accessioned | 2021-06-13T06:35:31Z | - |
| dc.date.available | 2010-01-19 | |
| dc.date.copyright | 2006-01-19 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2006-01-12 | |
| dc.identifier.citation | [1] S. C. Cripps, RF Power Amplifiers for Wireless Communications, Artech House, Norwood, MA, 1999.
[2] S. C. Cripps, Advanced Techniques in RF Power Amplifier Design, Artech House, Norwood, MA, 2002. [3] R. J. McMarrow, D.M. Upton et P. R. Maloney, “ The Microwave Doherty amplifier,” IEEE MTT-S Digest, 1994, pp. 1652-1656b [4] F.H. Raab, P.M. Asbeck, S. Cripps, P.B. Kenington, Z. B. Popovic, N. Pothecary, J. F.Sevic, and N. O. Sokal, “Power amplifiers and transmitters for RF and microwave, ” IEEE Trans. Microwave Theory Tech., vol. 50, pp. 814-826, Mar. 2002. [5] Y. Yang; J. Cha; B. Shin and B. Kim, “A Microwave Doherty Amplifier Employing Envelope Tracking Technique for High Efficiency and Linearity,” IEEE Microwave and Wireless Components Letters, vol. 13, pp. 370-372, 2003 Sept. [6] YunSeong Eo and KwangDu Lee, “High efficiency 5GHz CMOS power amplifier with adaptive bias control circuit,” in IEEE Radio Frequency Integrated Circuits Symposium Dig., pp. 575 – 578, June 2004. [7] V. Saari, P. Juurakko, J. Ryynanen, and K. Halonen, “Integrated 2.4 GHz class-E CMOS power amplifier,” in IEEE Radio Frequency integrated Circuits Symposium Dig., pp. 645 – 648, June 2005. [8] Jongchan Kang, Kyungho Lee, Jehyung Yoon, Yisun Chung, Sungbo Hwang, and Bumman Kim, “Differential CMOS linear power amplifier with 2nd harmonic termination at common source node,” in IEEE Radio Frequency integrated Circuits Symposium Dig., pp. 443 – 446, June 2005. [9] M. Iwamoto, A. Williams, Pin-Fin Chen, A. G. Metzger, L. E. Larson, Peter M. Asbeck “An Extended Doherty Amplifier With High Efficiency Over a Wide Power Range,” IEEE Trans. Microwave Theory Tech., vol. 49, No. 12, Dec. 2001. [10] Y. Yang, J. Cha, B. Shin, and B. Kim, “A Fully Matched N-way Doherty Amplifier with Optimized Linearity,” IEEE Trans. Microwave Theory and Tech., vol. 51, No. 3, pp. 986-993, march 2003. [11] Y. Yang, J. Cha, B. Shin, B. Kim, “ Optimum Design for Linearity and Efficiency of a Microwave Doherty Amplifier Using a New Load Matching Technique,” Microwave Journal, September 2003. [12] Chih-Yun Liu, Yi-Jan Emery Chen, and Deukhyoun Heo, “Impact of bias schemes on Doherty power amplifiers,” in Proc. IEEE International Symposium on Circuits and Systems, vol. 1, pp. 212-215, May 2005. [13] Cheng-Chi Yen, Huey-Ru Chuang, “A 0.25-_m 20-dBm 2.4-GHz CMOS Power Amplifier with an Integrated Diode Linearizer,” IEEE Microwave and Wireless Components letters, vol. 13, no. 2, February 2003. [14] Y.S. Noh and C.S. Park, “Intelligent Power Amplifier MMIC Using Adaptive Bias Control Circuit for W-CDMA Applications,” IEEE Journal of Solid State Circuit, vol. 39 , Issue: 6 , pp.967-970, June 2004. [15] Young-Woong Kim, Ki-Chhon Han, Seok-Yong Hong, and Jin-Ho Shin, “A 45% PAE / 18mA Quiescent Current CDMA PAM with a Dynamic Bias Control Circuit,” IEEE RFIC Symposium. June 2004. [16] Youngoo Yang, Kevin Choi, and Kenneth P. Weller, “DC Boosting Effect of Active Bias Circuits and Its Optimization for Class-AB InGaP–GaAs HBT Power Amplifiers,” IEEE Transaction on Microwave Theory and Techniques, vol. 52, no. 5, MAY 2004. [17] YunSeong Eo, KwangDu Lee, “High Efficiency 5GHz CMOS Power Amplifier with Adaptive Bias Control Circuit,” IEEE Radio Frequency integrated Circuits Symposium Dig., pp. 575-578, June 2004. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/34846 | - |
| dc.description.abstract | 本論文探討以UMC CMOS 0.18um RF製程來實現Doherty PA電路架構，以提高6dB-backoff 時的功率輸出效率。經由S參數的量測，在2.4GHz的頻段中，有10.6dB的小訊號增益。該電路的最大輸出功率與P1dB分別為22.6dB與21.4dBm。此時PAE最高可達33.6%，於P1dB點為32.6%，在6dB-backoff時仍高達21.1%的高效率值。由於晶片內部不需採用螺旋電感，其晶片面積僅666*999 µm2。 | zh_TW |
| dc.description.abstract | The Doherty power amplifier using UMC CMOS 0.18um is designed at a frequency of 2.4 GHz. Characterized by the S-parameter measurement, the S21 is 10.6dB. The maximum output power and P1dB can achieve 22.6dB and 21.4dBm, respectively. The maximum PAE is 33.6% and the PAE is 32.6% at P1dB. At 6dB back-off from P1dB, the achieved PAE is 21.1%. Without using on-chip spiral inductors, the area of the PA is only 666*999 µm2. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T06:35:31Z (GMT). No. of bitstreams: 1 ntu-94-R92943089-1.pdf: 2226204 bytes, checksum: 0643fbff3f76c03ddc677edc4d705bfd (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | 摘要 I
Abstract II Table of Contents III 1 Introduction 1 1.1 Motivation 1 1.2 Overview of The Thesis 2 2 Efficiency Enhancement Techniques 3 2.1 Chireix’s Outphasing Amplifier 4 2.2 Envelope Elimination and Restoration 8 2.3 The Doherty Power Amplifier 9 2.3.1 The Load Pulling Effect 9 2.3.2 The Operation Principle 14 2.3.3 Efficiency Enhancement 15 2.4 Summary 16 3 Design and Investigation 18 3.1 Doherty Power Amplifier Architecture 19 3.2 Power Device 19 3.3 Load Pull Impedances 21 3.4 The Output Combiner 22 3.5 The Bias Scheme for Auxiliary PA 23 3.5.1 The Function of Adaptive Bias 26 3.5.2 The Bandwidth of Adaptive Bias 28 3.6 Transmission Line Mismatch 31 3.7 Summary 33 4 Implementation and Measurement Result 35 4.1 Doherty PA Implement 35 4.2 The Wilkinson Power Splitter 38 4.3 The Measurement Result 40 5 Conclusion 45 Reference 48 | |
| dc.language.iso | en | |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | 調變式偏壓電路 | zh_TW |
| dc.title | IEEE 802.11b/g 整合調變式偏壓電路之高效率CMOS功率放大器 | zh_TW |
| dc.title | IEEE 802.11b/g High Efficiency CMOS Power Amplifier with an Integrated Adaptive Bias Circuit | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 94-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 黃天偉(Tian-Wei Huang),呂良鴻(Liang-Hung Lu),林盈熙(Brian Lin) | |
| dc.subject.keyword | 功率放大器,調變式偏壓電路, | zh_TW |
| dc.subject.keyword | CMOS,power amplifier,adaptive bias, | en |
| dc.relation.page | 49 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2006-01-12 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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| ntu-94-1.pdf 未授權公開取用 | 2.17 MB | Adobe PDF |
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