基於正交分頻多工及多重輸入輸出之基頻感知無線電接收機設計與製作

Abstract

隨著無線通訊技術的進步，相關的應用日漸普及。但通訊資源有限，傳輸的頻寬需要被更有效的使用；感知無線電系統就是被認為可行的解決方案。所謂感知無線電是能隨著外界環境的改變，動態的調整其傳輸頻寬、功率、調變方式等而能更有效的使用頻譜資源。現階段，感知無線電重要的研究方向是將系統適當的架構於現存通訊系統中，以更有效的利用通訊資源並提供更佳的服務。 本論文目的是設計並實現一套基頻感知無線電接收機，將其架構於IEEE 802.11a系統上，與之共存且不干擾到主要使用者的運作。論文根據所屬感知無線電計畫框架，從整體系統設計的觀點來討論基頻部分應具備的能力；同時藉由對IEEE 802.11a媒體存取層的討論，進行基頻接收機架構之設計以確保全系統能合適的操作在該環境下。為支援270種動態使用頻段的能力，論文採用一套容易產生且具良好特性的序列做為傳送封包內的長前置碼，解決一般系統欲支援多種傳輸頻譜配置會遇到的問題。使用改進的演算法來進行通道訊噪比之估測，使晶片具備對外界環境變化快速認知的能力，並支援基本的頻帶閒置偵測功能。藉由硬體上參數化的設計，接收機能操作在128種不同的功能組態，也使其具有跨平台，即當作802.11a接收機操作之能力。利用TSMC 0.18um 1P6M CMOS製程來實現基頻感知無線電接收機晶片，得到的面積為3.584x3.585mm2。佈局後的模擬顯示在160MHz、核心電壓1.8V的操作環境下，晶片消耗功率為720mW並且能達到1.404Gbps的資料傳輸速率。藉由使佈局後模擬及軟體程式模擬之結果相同，我們能確定晶片具有卓越的封包錯誤率表現。

As wirelsss communication technology advances, related applications are becoming pervasive; however, the major communication resource, bandwidth, is limited and needs to be utilized efficiently. Cognitive radio is considered a promising solution for spectrum utilization dilemma. A cognitive radio can sense the surrounding changes and adjust its transmission parameters such as bandwidth, power and modulation properly to obtain better performance and resource utilization. Currently, one major research direction is to construct cognitive radios onto existing primary systems to realize advantages mentioned above. In this thesis, we aim to design and implement a baseband cognitive radio receiver chip above the platform of IEEE 802.11a, resulting no interference to existing users inside. Under the entire cognitive radio project in NTU sponsored by MediaTek Inc., this thesis defines firstly 4 main cognitive features that should be integrated into our baseband system and constructs the baseband receiver based on discussion about IEEE 802.11a MAC. To provide dynamic spectrum allocation ability, we adopt a dedicate sequence as long preamble with good correlation and power properties that conventional OFDM system cannot compete with. By designing system packet format and channel model appropriately, the chip is fully compatible with IEEE 802.11a. An improved algorithm for doing signal to noise ratio estimation is used to get faster environmental awareness; also, the receiver has basic sensing capability. Through parameterized design, an overall of 128 operating configuration is achieved, enabling receiver more performance diversity and functioning fully as an 802.11a mobile terminal. Finally, the baseband cognitive radio receiver chip is implemented by TSMC 0.18um 1P6M CMOS process, with an area of 3.584x3.585mm2. Post-layout simulation shows the chip consumes 720mW under 1.8V supply voltage and 160MHz clock rate, supporting data rate up to 1.404Gbps. Also, superior performance of the chip and desired capability are confirmed through the comparison between post-layout and software simulations.