請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/24041
標題: | 去耦電漿氮化閘極氧化層之元件特性 The Characteristics of MOS Devices with Nitrided Gate Oxide by Decoupling Plasma Nitridation |
作者: | Shian-Hau Liao 廖顯皜 |
指導教授: | 胡振國 |
關鍵字: | 金氧半電容,氮化閘極氧化層, MOS,Nitrided gate oxide, |
出版年 : | 2006 |
學位: | 碩士 |
摘要: | 為了達到快速及低耗電之元件,減少閘極氧化層厚度是現代超大型積體電路工程的一個主流。在傳統的動態隨機存取記憶體製程中,p型金氧半場效電晶體(pMOSFETs)用的是n+ 2多晶矽閘極以節省製程步驟及成本,但使用通道離子佈植(channel implant)以求CMOS臨界電壓匹配會形成深埋通道(buried channel)而降低速度。若為求更高速的動態隨機存取記憶體元件,改採用p+ 多晶矽閘極,則其中”硼離子穿透效應”(boron penetration)的問題將影響超薄閘極氧化層之元件特性。目前有許多方法可抑制”硼離子穿透效應”(boron penetration)的問題,其中使用去耦電漿氮化閘極氧化層是目前最有效方法之一。因此本論文將討論去耦電漿氮化閘極氧化層之元件特性。
第一章將針對使用去耦電漿氮化閘極氧化層之背景以及實驗規劃做個簡介,包含元件的製程內容、元件結構及量測儀器,以註明本實驗之過程。 第二章將探討氮化閘極氧化層之厚度之量測方法,包含光學量測、X光量測及顯微鏡量測。在藉由去耦離子製程功率調整植入不同的氮離子濃度,本研究利用SIMS分析氮離子在閘極氧化層內之濃度對深度分布曲線圖及利用XPS分析氮原子相對於氧原子之比率。 第三章將分析去耦氮化閘極氧化層之電容-電壓關係,量測不同頻率下的閘極電容,並從中可得到隨著改變植入氮離子濃度來觀察電容增大的效應、平帶電壓變動和相對界面缺陷電荷密度結果;之後研究電流-電壓關係,觀察電流增大的機制,並提出局部變薄效應(Local thinning effect)和缺陷輔助穿邃(trap assisted tunneling)效應來解釋氮離子植入增大電流的原因。最後將針對氮化閘極氧化層之可靠度進行測試,在持續電壓和持續電流加壓下,來探討其崩潰機制、電容衰減及電流穿透等特性。 最後,第四章是本論文之結論及未來工作建議。 To obtain high speed and low power consumption device, the gate oxide thickness shrinkage is a main stream in modern VLSI industry. In conventional DRAM process, n+ poly gate is used for pMOSFETs to save process steps and cost. However, it generally needs p-type implant (boron, BF2) for threshold voltage (Vt) adjustment for CMOS technology. The implant leads p-channel far away from surface, and therefore results in the so called buried channel. The p+ poly gate will be adopted for pMOSFETs to gain high speed DRAM device. It induces “boron penetration” from the p+ doped poly gate to the cannel through the thin gate oxide. It is well known that boron penetration causes degradation of device performance. In order to block boron penetration, nitrided gate oxides formed by decoupling plasma nitridation (DPN) are good candidates to meet the target. In this thesis, we are going to discuss the characteristics of DPN nitrided gate oxide. Chapter 1 is an introduction of DPN nitrided gate oxide experiment. The process flow design, device structure and measurement tool are also introduced to realize this experiment. Chapter 2 is a discussion for metrology of physical thickness, nitrogen concentration and profile in ntrided gate oxide. The analysis methods are including optical ellipsometer, XPS, TEM, SEM, TOF-SIMS and so on. Chapter 3 is the electrical characteristics of nitrided gate oxide. The C-V curves are extracted by various frequencies to compare VFB shift, CET, Dit with nitrogen. It is explained that the leakage current increases with nitrogen by “local thinning effect” and “trap assisted tunnel”. Finally, it is of importance to examine the reliability of nitrided gate oxide by CCV and CCS. The mechanism of breakdown is discussed via the TZDB and TDDB tests. The leakage increase and capacitance degradation are also discussed by SILC and NBTI. Finally, the conclusion and suggestion for future work are given in Chapter 4. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/24041 |
全文授權: | 未授權 |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-95-1.pdf 目前未授權公開取用 | 1.5 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。