基於持續性記憶體的硬體加速預寫式日誌

Abstract

持續性記憶體前景看好，因為它可以提供與 DRAM 相當的性能，並同時具有儲存裝置的持久性。 隨著 Intel Optane DIMM 發布，持續性記憶體的採用已成為現實的解決方案。 持續性記憶體的挑戰是如何有效地支援原子持久性。 在這篇論文中，我們提出了第一個基於 Intel Optane DIMM 架構的硬體加速日誌。 我們提出的複合式日誌機制是基於 Intel Optane DIMM 的兩個新功能，記憶體控制器中的持續性 WPQ 和 DIMM 上的控制器而設計的。 我們利用 WPQ 作為放置重做日誌的區域，並擴展 DIMM 控制器以支援持續性記憶體內複製，因此撤消日誌可以在持續性記憶體內部進行，而不會引起額外的記憶體匯流排流量。 結果表明，提出的機制是實用且有效的（與 Intel Optane DIMM 相比，硬體開銷微不足道），與理想情況下（即不保證一致性）相比，事務吞吐量僅略低於 3.8%，並且與 LAD 相比，吞吐量高於 41.0%。

Persistent memory (PM) is promising as it offers comparable performance to DRAM with the durable property of storage devices. The adoption of PM has has become a real-world solution with the release Intel Optane DIMM. The key challenge for persistent memory is to support atomic durability efficiently. In this thesis, we propose the first hardware-based logging mechanism based on Intel Optane DIMM architecture. The proposed hybrid in-PM Hybrid logging mechanism is designed based on two new features of Intel Optane DIMM, persistent write pending queues in the memory controller, and the DIMM controller. We leverage the persistent write pending queue to serve as a redo log area and augment DIMM controller to support in-memory copy so undo logging can proceed inside PMs without introducing extra bus traffics. The results show the proposed logging mechanism is practical (insignificant hardware overheads compared Intel Optane DIMM) yet effective, within 3.8% transaction throughput of the ideal case (without consistency guarantee) and 41.0% higher throughput than LAD.