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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.advisor | 吳安宇(An-Yeu Wu) | |
dc.contributor.author | Shao-Wei Feng | en |
dc.contributor.author | 馮紹惟 | zh_TW |
dc.date.accessioned | 2021-05-20T21:05:17Z | - |
dc.date.available | 2016-08-26 | |
dc.date.available | 2021-05-20T21:05:17Z | - |
dc.date.copyright | 2011-08-26 | |
dc.date.issued | 2011 | |
dc.date.submitted | 2011-08-19 | |
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McBride, “A Technique for the Identification of Linear System,” IEEE Trans. Auto. Cont., vol. AC-10, pp.461-464, Jul., 1965. [35] S.L. Netto, P.S.R. Diniz, and P. Agathoklis, “Adaptive IIR Filtering Algorithms for System Identification: A General Framework,” IEEE Trans. Educ., vol.38, pp.54-66, Feb. 1995. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/10145 | - |
dc.description.abstract | 隨著無線區域網路應用的普及,使用者對於頻寬的需求越來越高,現存無線區域網路(WLAN)規格所能提供的傳輸速率漸漸不敷使用,而IEEE 802.11n的主要目的是制定一個新的WLAN標準以提供更高的傳輸速率,以便滿足現在及未來的頻寬需求。而此標準和其它WLAN規格最大的不同即是採用正交分頻多工(OFDM)技術以及多輸入多輸出(MIMO)技術的結合,使得傳輸速率能夠大幅的提升。
在OFDM系統裡,當通道長度大於循環字首(CP),為了減少ISI的雜訊影響,通常會在接受端加上時域通道等化器(TEQ)來縮短等效通道長度。但是傳統的TEQ演算法可能會造成頻譜缺陷的現象,使得系統效能被降低。 在這篇論文中,我們提出一個可以有效降低頻譜缺陷現象的TEQ演算法,除此之外,我們還利用共同考量技術將此演算法延伸到MIMO的環境。而從模擬結果來看,我們提出的演算法比起傳統的演算法,在MIMO-OFDM系統裡可以得到更好的系統效能。 另外,我們利用延遲因子估算、矩陣特性和Gauss-Seidel疊代演算法來降低在TEQ演算法裡存在的高運算複雜度的問題。而此TEQ硬體架構可以提供不管是SISO還是MIMO環境下去運作。除了硬體複雜度被降低外,所有接收天線可以共用一個TEQ硬體,而此TEQ硬體在折疊技術的運用下,只包含了二十個複數乘法器。最後這個硬體在VLSI的技術下實現,在UMC90 40MHz的時間操作下,面積為1.91mm2,可以提供1x1到 4x4等16種不同的MIMO天線數環境中去運作。 | zh_TW |
dc.description.abstract | With the popular application of wireless local area network (WLAN), there is an increasing demand for bandwidth by the users. Some existing WLAN specifications cannot provide adequate transmission rate gradually. The main purpose of IEEE 802.11n WLAN standard is to provide a higher transmission rate to meet present and future bandwidth requirements. The difference between IEEE 802.11n and previous standards is the use of multiple input multiple output (MIMO) technique combining with OFDM which causes substantially improvement of transmission rate.
In orthogonal frequency division multiplexing (OFDM) systems, a time-domain equalizer (TEQ) is used to reduce the inter-symbol interference (ISI) by shortening the channel impulse response when the channel length is larger than cyclic prefix (CP) length. However, conventional channel shortening methods may have frequency notch problem which will cause performance degradation. In this thesis, we propose a channel shortening algorithm to effectively mitigate the frequency notch effect. Besides, we also extend the proposed algorithm to MIMO environment with joint channel shortening technique. The simulation results show that the proposed algorithm has the best system performance in the MIMO-OFDM system as compared with other channel shortening algorithms. We use the delay estimate method, matrix property and Gauss-Seidel iterative method to reduce the high computation complexity TEQ design. The proposed TEQ algorithm architecture can provide SISO to MIMO environment and the one TEQ can be shared for other receivers with only twenty complex multipliers by folding technique. Finally, the TEQ engine is implemented in UMC90 40 MHz with 1.91 mm2. And it can provide the MIMO environment from 1X1 to 4X4. | en |
dc.description.provenance | Made available in DSpace on 2021-05-20T21:05:17Z (GMT). No. of bitstreams: 1 ntu-100-R98943133-1.pdf: 1416436 bytes, checksum: 25fa74f94dae4eae287b89f60171d26e (MD5) Previous issue date: 2011 | en |
dc.description.tableofcontents | List of Figures VII
List of Tables XI Chapter 1 Introduction 1 1.1 Overview of Channel Shortening 2 1.2 Motivation and Contribution 8 1.3 Thesis Organization 11 Chapter 2 Conventional TEQ Design 12 2.1 MSSNR Algorithm 14 2.2 MMSE Algorithm 16 2.3 Min-ISI Algorithm 18 2.4 Channel Shortening with Controlled TIR quality 20 Chapter 3 TEQ Algorithm with Effective Frequency Notch Mitigation for OFDM System 24 3.1 Design Concept for SISO OFDM System 26 3.2 Extension for MIMO OFDM System 35 3.3 Simulation Results 37 Chapter 4 Reduction of Computation Complexity 42 4.1 Delay Estimation 44 4.2 Matrix Multiplication 47 4.3 Iteration Algorithm for Matrix Inversion 50 Chapter 5 Implementation of TEQ 58 5.1 Hardware Architecture and System Spec 58 5.2 Wordlength Analysis 61 5.3 Architecture Design 63 5.4 VLSI Implementation 67 5.5 IP Summay 69 Chapter 6 Conclusions and Future Works 70 6.1 Conclusion 70 6.2 Future Works 72 References 73 | |
dc.language.iso | en | |
dc.title | 適用於MIMO-OFDM系統之通道縮短等化器演算法開發及硬體架構設計 | zh_TW |
dc.title | Channel Shortening Equalizer Algorithm and VLSI Architecture for MIMO-OFDM Systems | en |
dc.type | Thesis | |
dc.date.schoolyear | 99-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 曹恆偉(Hen-Wai Tsao),黃元豪(Yum-Hai Huang),蔡佩芸(Pei-Yun Tsai),劉軒宇(Hsuan-Yu Liu) | |
dc.subject.keyword | 多輸入多輸出,正交分頻多工,時域等化器,通道縮短,頻譜缺陷, | zh_TW |
dc.subject.keyword | MIMO,OFDM,Time domain equalier,channel shortening,frequency notch, | en |
dc.relation.page | 77 | |
dc.rights.note | 同意授權(全球公開) | |
dc.date.accepted | 2011-08-21 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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