半導體晶圓圖遷移學習於開放世界半監督學習之 TFT-LCD 電性測試缺陷分類

Abstract

在TFT-LCD面板製造過程中，缺陷模式的偵測與分類是具高度挑戰性的任務。儘管近年深度學習技術已廣泛應用於自動缺陷分類，現有方法大多聚焦於對已知模式的分類，忽略了實際應用中可能遇到且需要分類的新穎缺陷模式。此外，傳統方法亦面臨數據稀少、標註不足與類別不平衡等問題，進一步限制這些方法在製造現場的實用性。為了解決上述限制，本研究提出一個針對TFT-LCD電性缺陷的開路/短路測試圖（TOS map）之二階段缺陷分類框架。第一階段使用來自半導體製程的晶圓圖進行對比式預訓練，以在有限的TOS map數據下提升分類效果。隨後採用新穎的雙分支開放世界半監督學習方法，穩健地處理類別不平衡和新穎缺陷模式的辨識問題。本研究以業界專家驗證的模擬TOS map資料集驗證方法論，結果顯示本方法在兩種實務情境下皆展現優良的效力，分別達到 98.5% 與 99.2% 的總分類準確率。與基準方法ORCA（搭配本研究提出之預訓練策略）相比，所提出的開放世界半監督學習方法在兩情境分別提升 10.7% 與 52.0% 的準確率，同時具有較低的分類變異，驗證了該方法在TFT-LCD製造智慧品質控制中的有效性。

Defect pattern detection and classification present significant challenges in thin-film transistor liquid-crystal display (TFT-LCD) manufacturing. While deep learning techniques have advanced automatic defect classification, most methods focus on known defect patterns, neglecting novel defect patterns that may be encountered in practical applications and require classification. Moreover, traditional approaches struggle with data scarcity, insufficient labeling, and class imbalance. To address these limitations, this study proposes a two-stage defect classification framework for Test for Open/Short (TOS) maps, which measure electrical defects. Specifically, our two-stage framework begins with contrastive pre-training on semiconductor manufacturing wafer bin maps to enhance classification with limited TOS data, followed by a novel dual-branch open-world SSL methodology that robustly handles both class imbalance and novel pattern discovery. Experimental validation on industry-validated synthetic TOS datasets demonstrates superior performance across two practical scenarios, achieving total accuracies of 98.5% and 99.2%. Compared to the baseline ORCA (with our pretraining strategy), the proposed approach yields accuracy improvements of 10.7% and 52.0%, with reduced variance, validating its effectiveness for intelligent quality control in TFT-LCD manufacturing.