用於大規模VLSI電源傳輸網路之階級式靜態電壓模擬

Abstract

隨著積體電路（IC）設計日益複雜，確保大規模電源傳輸網路（Power Delivery Networks, PDNs）的電源完整性已成為一項關鍵挑戰。因此，快速且精確的 IR drop 分析對於細部模組建模以及整體系統的可擴展性而言，皆是不可或缺的關鍵。 本論文提出兩種適用於大規模 PDN 的階層式靜態 IR drop 模擬方法，分別對應於設計後期的驗證與前期的預估需求：HiPSim，一種新開發的階層式並行模擬架構，以及客製化的代數多重網格（Algebraic Multigrid, AMG）求解器。HiPSim 採用結構化的區塊分割策略，並依序進行節點重新排序與內部節點的並行求解，以加速整體模擬效率。而 AMG 解法則運用多層級矩陣粗化與內插技巧，有效處理大規模系統。 與商用模擬工具 Synopsys HSPICE 相比，HiPSim 可達到 15 倍的加速效果，並降低 55% 的記憶體使用量，且控制在 1e-6 以內的電壓誤差；而 AMG 則實現了 23 倍的加速效果與 68% 的記憶體節省，並將誤差控制在 1% 左右。實驗結果顯示，這兩種方法在自建的大型 PDN 測試資料上皆大幅優於傳統平坦式模擬器，展現其在現代 VLSI 電源完整性驗證中的實用性與可擴展性。

As integrated circuit (IC) complexity continues to increase, ensuring power integrity in large-scale power delivery networks (PDNs) has become a critical design challenge. Fast and accurate IR drop analysis is thus essential for both detailed module modeling and overall system scalability. This work presents two hierarchical static IR drop analysis approaches for scalable PDN simulation, targeting late-stage verification and early-stage estimation: HiPSim, a novel hierarchical and parallel framework, and AMG, a customized multigrid-based solver. HiPSim employs a structured block-partitioning strategy, followed by node reordering and parallel internal node solving to accelerate computation. The AMG solver leverages multilevel matrix coarsening and interpolation techniques to efficiently handle large systems. Compared to Synopsys HSPICE, HiPSim achieves a speedup of 15 times and 55 percent lower memory usage, with accuracy loss within 1e-6, while AMG achieves a speedup of 23 times and 68 percent memory reduction, with approximately 1 percent accuracy loss. Experiments on self-generated PDN benchmarks show both methods significantly outperform traditional flat solvers, providing scalable and practical solutions for modern VLSI power integrity verification.