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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 王暉 | zh_TW |
| dc.contributor.advisor | Huei Wang | en |
| dc.contributor.author | 吳源深 | zh_TW |
| dc.contributor.author | Yuen-Sum Ng | en |
| dc.date.accessioned | 2025-05-01T16:04:26Z | - |
| dc.date.available | 2025-05-02 | - |
| dc.date.copyright | 2025-05-01 | - |
| dc.date.issued | 2025 | - |
| dc.date.submitted | 2025-02-06 | - |
| dc.identifier.citation | [1] 3rd Generation Partnership Project (3GPP). (2024). [Online]. Available: https://www.3gpp.org/
[2] TeleGraphics. (2023) A Look at the Current Status of 5G and Millimeter Wavesat Home and Abroad [Part 2]–Standardization Trends and Movements in Each Country. [Online]. Available: https://www.telegraphic.jp/en/2023/12/107/ [3] Qorvo. (2024) 3GPP FREQUENCY BANDS. [Online]. Available: https://www.qorvo.com/design-hub/design-tools/interactive/3gpp-frequency-bands [4] Qualcomm. (2022) 3GPP Release 17:Completing the first phase of th 5G evolution. [Online]. Available: https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/download-our-5g-nr-rel-17-presentation.pdf [5] Keysight. (2022) Autonomous Driving and Automotive Radar. [Online]. Available: https://www.keysight.com/us/en/assets/7018-06570/posters/5992-3838.pdf [6] T. S. Rappaport, J. N. Murdock, and F. Gutierrez, “State of the Art in 60-GHzIntegrated Circuits and Systems for Wireless Communications,” Proc. of the IEEE,vol. 99, no. 8, pp. 1390–1436, Aug. 2011. [7] Global Foundries. FDXTM FD-SOI. [Online]. Available: https://gf.com/technology-platforms/fdx-fd-soi/ [8] Global Foundries. RF SOI. [Online]. Available: https://gf.com/technology-platforms/rf-soi/ [9] ST Microelectronics. Autonomous Driving and Automotive Radar. [Online].Available: https://www.st.com/content/st_com/en/about/innovation---technology/FD-SOI.html [10] Towerjazz Semiconductors. FD-SOI: A unique solution for mixed-signal applications. [Online]. Available: https://towersemi.com/technology/rf-and-hpa/rf-soi-rf-cmos-platforms/ [11] Qualcomm. (2020) Global update on spectrum for 4g & 5g. [Online].Available: https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/messaging_presentation_-_4g_5g_spectrums_-_december_2020.pdf [12] B. Sadhu, Y. Tousi, J. Hallin, S. Sahl, S. K. Reynolds, Ö. Renström et al., “A 28-GHz 32-element TRX phased-array IC with concurrent dual-polarized operationand orthogonal phase and gain control for 5G communications,” IEEE J. SolidState Circuits, vol. 52, no. 12, pp. 3373–3391, Dec. 2017. [13] T. Kuwabara, N. Tawa, Y. Tone, and T. Kaneko, “A 28 GHz 480 elements digital AAS using GaN HEMT amplifiers with 68 dBm EIRP for 5G long-rangebase station applications,” in Proc. IEEE Compound Semico. Integr. Circuit Symp.(CSICS), Oct. 2017, pp. 1–4. [14] J. Pang, R. Wu, Y. Wang, M. Dome, H. Kato, H. Huang et al., “A 28GHz CMOSphased-array transceiver featuring gain invariance based on LO phase shifting architecture with 0.1-degree beam-steering resolution for 5G new radio,” in Proc.IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Jun. 2018, pp. 56–59. [15] K. Kibaroglu, M. Sayginer, and G. M. Rebeiz, “A low-cost scalable 32-element28-GHz phased array transceiver for 5G communication links based on a 2 × 2beamformer flip-chip unit cell,” IEEE J. Solid-State Circuits, vol. 53, no. 5, pp.1260–1274, May 2018. [16] R. Lu, C. Weston, D. Weyer, F. Buhler, D. Lambalot, and M. P. Flynn, “A 16-element fully integrated 28-GHz digital RX beamforming receiver,” IEEE J. SolidState Circuits, vol. 56, no. 5, pp. 1374–1386, May 2021. [17] Y. Wang, R. Wu, J. Pang, D. You, A. A. Fadila, R. Saengchan et al., “A 39-GHz 64-element phased-Array transceiver with built-in phase and amplitude calibrations forlarge-array 5G NR in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 55, no. 5,pp. 1249–1269, May 2020. [18] Y. Yin, S. Zihir, T. Kanar, Q. Ma, H. Chung, L. Gao et al., “A 37– 42-GHz 8 ×8 phased-array with 48– 51-dBm EIRP, 64– QAM 30-Gb/s data rates, and EVManalysis versus channel RMS errors,” IEEE Trans. Microw. Theory Techn., vol. 68,no. 11, pp. 4753–4764, Nov. 2020. [19] Z. Chen, Z. Jiang, Z. Liu, Y. Cheng, L. Zhang, D. Chen et al., “A 256-QAM 39 GHzdual-channel transceiver chipset with LTCC package for 5G communication in 65nm CMOS,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2018, pp. 1476–1479. [20] X. Li, Z. Cherr, S. Sun, C. Zhao, H. Liu, Y. Wu et al., “A 39 GHz MIMO transceivebased on dynamic multi-beam architecture for 5G communication with 150 metercoverage,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2018, pp. 489–491. [21] C.-N. Chen, Y.-H. Lin, L.-C. Hung, T.-C. Tang, W.-P. Chao, C.-Y. Chen et al., “38-GHz phased array transmitter and receiver based on scalable phased array moduleswith endfire antenna arrays for 5G MMW data links,” IEEE Trans. Microw. TheoryTechn., vol. 69, no. 1, pp. 980–999, Jan. 2021. [22] A. G. Roy, O. Inac, A. Singh, T. Mukatel, O. Brandelstein, T. W. Brown et al., “A37-40 GHz phased array front-end with dual polarization for 5G MIMO beamforming applications,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Jun.2019, pp. 251–254. [23] S. Mondal, L. R. Carley, and J. Paramesh, “Dual-band, two-layer millimeter-wavetransceiver for hybrid MIMO systems,” IEEE J. Solid-State Circuits, vol. 57, no. 2,pp. 339–355, Feb. 2022. [24] A. Dascurcu, S. Ahasan, A. Binaie, K. J. Lu, A. Natarajan, and H. Krishnaswamy,“A 60GHz phased array transceiver chipset in 45nm RF SOI featuring channel aggregation using HRM-based frequency interleaving,” in Proc. IEEE Radio Freq.Integr. Circuits Symp. (RFIC), Jun. 2022, pp. 67–70. [25] B. Rupakula, A. Nafe, S. Zihir, Y. Wang, T.-W. Lin, and G. Rebeiz, “63.5– 65.5-GHz transmit/receive phased-array communication link with 0.5– 2 Gb/s at 100–800 m and ± 50° scan angles,” IEEE Trans. Microw. Theory Techn., vol. 66, no. 9,pp. 4108–4120, Sep. 2018. [26] National Communications Commission. 數位無線電視電臺技術規範修正案總說明:. [Online]. Available: https://www.ncc.gov.tw/chinese/files/09011/563_8898_090110_2_C.PDF [27] B. Razavi, RF microelectronics, 2nd ed. Upper Saddle River, NJ: Prentice Hall,2012. [28] K.-Y. Lee, S.-W. Lee, Y. Koo, H.-K. Huh, H.-Y. Nam, J.-W. Lee et al., “Full-CMOS2-GHz WCDMA direct conversion transmitter and receiver,” IEEE J. Solid-StateCircuits, vol. 38, no. 1, pp. 43–53, Jan. 2003. [29] K.-J. Koh, M.-Y. Park, C.-S. Kim, and H.-K. Yu, “Subharmonically pumpedCMOS frequency conversion (up and down) circuits for 2-GHz WCDMA directconversion transceiver,” IEEE J. Solid-State Circuits, vol. 39, no. 6, pp. 871–884,Jun. 2004. [30] J.-H. Tsai and T.-W. Huang, “35– 65-GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wireless gigabit applications,”IEEE Trans. Microw. Theory Techn., vol. 55, no. 10, pp. 2075–2085, Oct. 2007. [31] S. Wang and G. M. Rebeiz, “Dual-Band 28- and 39-GHz phased arrays for multistandard 5G applications,” IEEE Trans. Microw. Theory Techn., vol. 71, no. 1, pp.339–349, Jan. 2023. [32] C. Nocera, G. Papotto, A. Cavarra, E. Ragonese, and G. Palmisano, “A 13.5-dBm1-V power amplifier for W-Band automotive radar applications in 28-nm FD-SOICMOS technology,” IEEE Trans. Microw. Theory Techn., vol. 69, no. 3, pp. 1654–1660, Mar. 2021. [33] S. Callender, S. Pellerano, and C. Hull, “An E-Band power amplifier with 26.3%PAE and 24-GHz bandwidth in 22-nm FinFET CMOS,” IEEE J. Solid-State Circuits, vol. 54, no. 5, pp. 1266–1273, May 2019. [34] S. Callender, S. Pellerano, and C. Hull, “A 73GHz PA for 5G phased arrays in14nm FinFET CMOS,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC),Jun. 2017, pp. 402–405. [35] J.-P. Colinge, FinFETs and Other Multi-Gate Transistors. Boston, MA: SpringerScience+Business Media, LLC, 2008. [36] A. Medra, V. Giannini, D. Guermandi, and P. Wambacq, “A 79GHz variable gainlow-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C,”in Proc. 40th Eur. Solid State Circuits Conf. (ESSCIRC), Sept. 2014, pp. 183–186. [37] G. Park, S. Park, and S. Jeon, “A High-Efficiency E-Band power amplifier withoptimized output matching network in a 28-nm bulk CMOS,” IEEE Trans. CircuitsSyst. II, vol. 71, no. 3, pp. 1032–1036, Mar. 2024. [38] D. Zhao and P. Reynaert, “A 40-nm CMOS E-Band 4-way power amplifier withneutralized bootstrapped cascode amplifier and optimum passive circuits,” IEEETrans. Microw. Theory Techn., vol. 63, no. 12, pp. 4083–4089, Dec. 2015. [39] D. Zhao and P. Reynaert, “An E-Band power amplifier with broadband parallelseries power combiner in 40-nm CMOS,” IEEE Trans. Microw. Theory Techn.,vol. 63, no. 2, pp. 683–690, Feb. 2015. [40] K.-Y. Wang, T.-Y. Chang, and C.-K. Wang, “A 1V 19.3dBm 79GHz power amplifier in 65nm CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech.Papers, Feb. 2012, pp. 260–262. [41] Y.-H. Hsiao, Y.-C. Chang, C.-H. Tsai, T.-Y. Huang, S. Aloui, D.-J. Huang et al.,“A 77-GHz 2T6R transceiver with injection-Lock frequency sextupler using 65-nm CMOS for automotive radar system application,” IEEE Trans. Microw. TheoryTechn., vol. 64, no. 10, pp. 3031–3048, Oct. 2016. [42] W. Wu, R. Chen, S. Chen, J. Wang, L. Chen, L. Zhang et al., “A Compact W-Bandpower amplifier with a peak PAE of 21.1% in 65-nm CMOS technology,” IEEEMicrow. Wireless Compon. Lett., vol. 33, no. 6, pp. 703–706, Jun. 2023. [43] L. Chen, L. Zhang, Y. Wang, and Z. Yu, “A compact e-band power amplifier withgain-boosting and efficiency enhancement,” IEEE Trans. Microw. Theory Techn.,vol. 68, no. 11, pp. 4620–4630, Nov. 2020. [44] W. Lv, Z. Duan, S. Wu, and Y. Wang, “A 68– 79 GHz 15.6dBm power amplifierin 65nm CMOS,” in Proc. Asia-Pacific Microw. Conf. (APMC), Nov. 2018, pp.1522–1524. [45] X. Huang, H. Jia, W. Deng, Z. Wang, and B. Chi, “A Compact E-Band loadmodulation balanced power amplifier using coupled transmission-line output network achieving 22.1-dBm Psat and 34.9%/12.2% efficiency at Psat/6-dB PBO,” inProc. IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2023, pp. 1–3. [46] S. Li and G. M. Rebeiz, “High efficiency D-Band multiway power combined amplifiers with 17.5– 19-dBm Psat and 14.2– 12.1% peak PAE in 45-nm CMOS RFSOI,”IEEE J. Solid-State Circuits, vol. 57, no. 5, pp. 1332–1343, May 2022. [47] U. Çelik and P. Reynaert, “An np matrix-based e-band power amplifier achieving24-gbit/s data rate using 256 qam in 22-nm fd-soi,” IEEE Trans. Microw. TheoryTechn., vol. 69, no. 11, pp. 4667–4677, Nov. 2021. [48] J. S.-C. Chien and J. F. Buckwalter, “A 111-149-GHz, compact power-combinedamplifier with 17.5-dBm Psat, 16.5% PAE in 22-nm CMOS FD-SOI,” in Proc. 48thEur. Solid State Circuits Conf. (ESSCIRC), Sept. 2022, pp. 453–456. [49] B. Philippe and P. Reynaert, “A 15dBm 12.8%-PAE Compact D-band power amplifier with two-way power combining in 16nm FinFET CMOS,” in IEEE Int. SolidState Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2020, pp. 374–376. [50] U. Çelik and P. Reynaert, “An E-Band compact power amplifier for future arraybased backhaul networks in 22nm FD-SOI,” in Proc. IEEE Radio Freq. Integr.Circuits Symp. (RFIC), Jun. 2019, pp. 187–190. [51] Y.-S. Ng, Y. Wang, S. K. Khyalia, C.-N. Chen, T.-C. Tang, Y.-W. Chang et al., “A38-GHz millimeter wave transmission system for unmanned aerial vehicle in 65nm CMOS,” in Prof. 17th Eur. Microw. Integr. Circuits Conf. (EuMIC), Sept. 2022,pp. 181–184. [52] Y.-S. Ng, Y. Wang, S. K. Khyalia, S.-K. Ho, Z.-H. Lin, C.-N. Chen et al., “A 2.2-km 39-GHz transceiver system for UAV application,” IEEE Trans. Microw. TheoryTechn., pp. 1–13, 2024, Early Access. [53] Y.-S. Ng, Y. Wang, and H. Wang, “A W-Band amplifier in FinFET technology,”in Proc. IEEE 24th Topical Meeting Silicon Monolithic Integr. Circuits RF Syst.(SiRF), Jan. 2024, pp. 5–8. [54] Y.-S. Ng, Y. Wang, S.-C. Chen, and H. Wang, “Design of two-way transformercombining E-band power amplifiers using 16-nm FinFET technology with optimalmatching networks,” IEEE Trans. Microw. Theory Techn., pp. 1–10, 2025, EarlyAccess. [55] Y.-S. Ng, Y. Wang, and H. Wang, “Design of the e-band power amplifier withcascode gain- and power-boosting and shunt capacitance matching improvement,”IEEE Microw. Wireless Techno. Lett., vol. 35, no. 1, pp. 87–90, 2025. [56] H.-T. Chou and Z.-H. Lin, “Polarization Agile Beam Steering by Subarray Antenna Module Design to Compensate Wide-Angle Polarization Discrepancy ofUser Equipment Antenna Radiations at mmW Frequencies,” IEEE Trans. Antennas Propag., vol. 70, no. 9, pp. 8137–8147, Sep. 2022. [57] W.-H. Lin, H.-Y. Yang, J.-H. Tsai, T.-W. Huang, and H. Wang, “1024-QAM highimage rejection E-Band sub-harmonic IQ modulator and transmitter in 65-nmCMOS process,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 11, pp. 3974–3985, Nov. 2013. [58] H. Friis, “A note on a simple transmission formula,” Proceedings of the IRE, vol. 34,no. 5, pp. 254–256, May 1946. [59] K. Chang, RF and microwave wireless systems. Hoboken, NJ: Wiley, 2000, pp.244–252. [60] D. M. Pozar, Microwave and RF design of wireless systems. Hoboken, NJ: Wiley,2000. [61] X. Guan, H. Hashemi, and A. Hajimiri, “A fully integrated 24-GHz eight-elementphased-array receiver in silicon,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp.2311–2320, Dec. 2004. [62] J. G. Proakis, Digital communications / John G. Proakis., 4th ed., ser. McGraw-Hillseries in electrical and computer engineering. Boston: McGraw-Hill, 2001. [63] H. Al-Rubaye and G. M. Rebeiz, “W-Band direct-modulation >20-Gb/s transmitand receive building blocks in 32-nm SOI CMOS,” IEEE J. Solid-State Circuits,vol. 52, no. 9, pp. 2277–2291, Sep. 2017. [64] A. Georgiadis, “Gain, phase imbalance, and phase noise effects on error vectormagnitude,” IEEE Trans. Veh. Technol., vol. 53, no. 2, pp. 443–449, 2004. [65] R. A. Shafik, M. S. Rahman, and A. R. Islam, “On the extended relationships amongEVM, BER and SNR as performance metrics,” in Int. Conf. on Ele. and Comp. Eng.,2006, pp. 408–411. [66] X.-Y. Li, Y.-C. Chen, Y. Wang, T.-W. Huang, and H. Wang, “A 38-GHz high linearity and high efficiency power amplifier for 5G applications in 65-nm CMOS,”in Proc. 50th Eur. Microw. Conf. (EuMC), Jan. 2021, pp. 178–181. [67] T.-C. Tang, C.-N. Chen, H.-H. Lin, J.-L. Lin, and H. Wang, “A 38-GHz subharmonic I/Q modulator using LO frequency quadrupler in 65-nm CMOS,” in Proc.Asia-Pacific Microw. Conf. (APMC), Dec. 2019, pp. 723–725. [68] S. K. Khyalia, Y.-S. Ng, H. Wang, and R. Zele, “A Wide Tuning Range PhaseLocked Loop for 38 GHz transceiver in 65 nm CMOS,” in Proc. IEEE Int. Symp.Radio-Freq. Integr. Technol. (RFIT), Aug. 2021, pp. 1–3. [69] Sonnet. [Online]. Available: https://www.sonnetsoftware.com/ [70] Unimicron. [Online]. Available: https://www.unimicron.com/en/ [71] K. Martin, “Complex signal processing is not complex,” IEEE Trans. Circuits Syst.I, vol. 51, no. 9, pp. 1823–1836, Sep. 2004. [72] Minicircuits. Surface Mount RF Transformer TCM2-43+. [Online]. Available:https://www.minicircuits.com/pdfs/TCM2-43X+.pdf [73] Anaren. XingerIII Hybrid Coupler 3 dB, 90◦ X3C14P1-03S .[Online]. Available: https://cdn.ttm.com/repository/products/wireless-xinger/3db-hybrid-couplers/X3C14P1-03S/X3C14P1-03S.pdf [74] Keysight. Momentum. [Online]. Available: https://www.keysight.com/us/en/assets/7018-02063/flyers/5990-3633.pdf [75] Onsemi NCP5663 Linear Regulator. [Online]. Available: https://www.onsemi.com/products/power-management/linear-regulators-ldo/ncp5663 [76] YTTEK Technology Corporation. [Online]. Available: https://yttek.com/ [77] Xilinx Kintex-7 FPGA Development Board. [Online]. Available: https://www.xilinx.com/products/silicon-devices/fpga/kintex-7.html [78] Analog Devices AD9361 RF Agile transceiver. [Online]. Available: https://www.analog.com/en/products/ad9361.html [79] C.-Y. Chu, Y.-P. Chen, J.-Z. Gao, C.-Y. Ke, Y.-W. Chen, L.-H. Chang et al., “AKa-Band scalable hybrid phased array based on four-element ICs,” IEEE Trans.Microw. Theory Techn., vol. 68, no. 1, pp. 288–300, Sep. 2020. [80] C.-Y. Chu, S.-T. Tseng, J.-Z. Gao, Y.-P. Chen, Y.-C. Chang, C.-W. Tseng et al., “Afully-integrated Ka-band 4TX/4RX phased-array transceiver IC in 65nm CMOS,”in Proc. IEEE Int. Symp. Radio-Freq. Integr. Technol. (RFIT), Aug. 2016, pp. 1–3. [81] ECSpressCON. ETXO-H(2.5V) low jitter, low current smd temperature compensated crystal oscillators (tcxo). [Online]. Available: https://www.mouser.hk/datasheet/2/122/ETXO_H-1651350.pdf [82] C. Crystals. CVHD-950 VCXO ultra-low phase noise oscillators. [Online].Available: https://www.mouser.hk/datasheet/2/94/CVHD_950-180353.pdf [83] R. B. Staszewski, All-digital frequency synthesizer in deep-submicron CMOS.Hoboken, N.J: Wiley-Interscience, 2006. [84] A. Demir, “Computing timing jitter from phase noise spectra for oscillators andphase-locked loops with white and 1/f noise,” IEEE Trans. Circuits Syst. I, vol. 53,no. 9, pp. 1869–1884, Sep. 2006. [85] T. Weigandt, B. Kim, and P. Gray, “Analysis of timing jitter in CMOS ring oscillators,” in Proc. IEEE Int. Symp. on Circuits Systems (ISCAS), vol. 4, Jun. 1994, pp.27–30. [86] K. Chang, RF and microwave wireless systems. Hoboken, NJ: Wiley, 2000, pp.140–142. [87] Ericsson. (2023) Ericsson microwave outlook report 2023. [Online]. Available:https://www.ericsson.com/en/reports-and-papers/microwave-outlook [88] E. Wagner and G. M. Rebeiz, “Single and power-combined linear e-band poweramplifiers in 0.12-µm sige with 19-dbm average power 1-gbaud 64-qam modulatedwaveforms,” IEEE Trans. Microw. Theory Techn., vol. 67, no. 4, pp. 1531–1543,Apr. 2019. [89] B. Cimbili, C. Friesicke, S. Wagner, M. S. Mugisho, M. Bao, and R. Quay, “Investigating feeding techniques for high-power and high-efficiency e-band poweramplifiers,” in Proc. IEEE Topical Conf. on RF/Microw. Power Amplif. for Radioand Wireless Appl. (PAWR), Jan. 2024, pp. 59–61. [90] C.-F. Chou, Y.-H. Hsiao, Y.-C. Wu, Y.-H. Lin, C.-W. Wu, and H. Wang, “Design ofa V -Band 20-dBm wideband power amplifier using transformer-based radial powercombining in 90-nm CMOS,” IEEE Trans. Microw. Theory Techn., vol. 64, no. 12,pp. 4545–4560, Dec. 2016. [91] S. Cripps, RF power amplifiers for Wireless Communications, Second Edition.Artech, 2006. [92] S. Cripps, Advanced Techniques in RF Power Amplifier Design. Artech, 2002. [93] W. L. Chan and J. R. Long, “A 58– 65 GHz neutralized CMOS power amplifierwith PAE above 10% at 1-V Supply,” IEEE J. Solid-State Circuits, vol. 45, no. 3,pp. 554–564, Mar. 2010. [94] M. Abdulaziz, H. V. Hünerli, K. Buisman, and C. Fager, “Improvement of AM–PM in a 33-GHz CMOS SOI power amplifier using PMOS neutralization,” IEEEMicrow. Wireless Compon. Lett., vol. 29, no. 12, pp. 798–801, Dec. 2019. [95] G. Gonzalez, Microwave transistor amplifiers: analysis and design. Prentice Hall,1997. [96] I. Aoki, S. Kee, D. Rutledge, and A. Hajimiri, “Distributed active transformer-a newpower-combining and impedance-transformation technique,” IEEE Trans. Microw.Theory Techn., vol. 50, no. 1, pp. 316–331, Jan. 2002. [97] C. A. Balanis, Antenna theory : analysis and design / Constantine A. Balanis.,3rd ed. Hoboken, NJ: John Wiley, 2005. [98] S. C. Cripps and d. IEEE Xplore (Online Service), RF power amplifiers for wirelesscommunications / Steve C. Cripps., 2nd ed., ser. Artech House microwave library.Boston: Artech House, 2006. [99] E. C. Wagner and G. M. Rebeiz, “An 8-way combined E-Band power amplifier with24 dBm Psat and 12% PAE in 0.12 µm SiGe,” in Proc. IEEE MTT-S InternationalMicrowave Symposium Digest (MTT), Jun. 2018, pp. 1342–1344. [100] B. Philippe and P. Reynaert, Mm-wave Circuit Design in 16nm FinFET for 6Gapplications, ser. Analog Circuits and Signal Processing Ser. Cham, Switzerland:Springer, 2022. [101] S. Pellerano, S. Callender, W. Shin, Y. Wang, S. Kundu, A. Agrawal et al., “A Scalable 71-to-76GHz 64-element phased-array transceiver module with 2 × 2 directconversion IC in 22nm FinFET CMOS technology,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2019, pp. 174–176. [102] S. Ong, L. Chan, K. Chew, C. Lim, W. L. Oo, A. Bellaouar et al., “22nm FD-SOItechnology with back-biasing capability offers excellent performance for enablingefficient, ultra-low power analog and RF/millimeter-wave designs,” in Proc. IEEERadio Freq. Integr. Circuits Symp. (RFIC), Jun. 2019, pp. 323–326. [103] A. Gatzastras, C. Volmer, and I. Kallfass, “A differential traveling-wave amplifierin a 22nm FD-SOI CMOS technology,” in Proc. German Microw. Conf. (GeMiC),May 2022, pp. 108–111. [104] A. Banerjee, B. Van Liempd, and P. Wambacq, “A stacked segmented adaptivepower amplifier in 22nm FD-SOI,” IEEE Microw. Wireless Compon. Lett., vol. 32,no. 8, pp. 983–986, Aug. 2022. [105] M. Vigilante and P. Reynaert, “A 68.1-to-96.4GHz variable-gain low-noise amplifier in 28nm CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech.Papers, Feb. 2016, pp. 360–362. [106] B. Razavi, Design of analog CMOS integrated circuits / Behzad Razavi., ser.McGraw-Hill series in electrical and computer engineering. Boston, MA:McGraw-Hill, 2006. [107] N. Lu, T. B. Hook, J. B. Johnson, C. Wermer, C. Putnam, and R. A. Wachnik,“Efficient and accurate schematic transistor model of FinFET parasitic elements,”IEEE Electron Device Lett., vol. 34, no. 9, pp. 1100–1102, Sep. 2013. [108] G. Hueber and A. M. Niknejad, FinFET Process technology for RF and MillimeterWave applications, ser. The Cambridge RF and Microwave Engineering Series.Cambridge University Press, 2019, p. 400– 431. [109] N. Lu and R. A. Wachnik, “Modeling of resistance in FinFET local interconnect,”IEEE Trans. Circuits Syst. I, vol. 62, no. 8, pp. 1899–1907, Aug. 2015. [110] C. C. Cheng, “Neutralization and unilateralization,” IRE Trans. on Circuit Theory,vol. 2, no. 2, pp. 138–145, Feb. 1955. [111] G. Gonzalez, Microwave transistor amplifiers: analysis and design, 2nd ed. UpperSaddle River, N.J: Prentice Hall, 2008, p. 364. [112] B. Philippe and P. Reynaert, Mm-wave circuit design in 16nm FinFET for 6G applications, ser. Analog Circuits and Signal Processing Ser. Cham, Switzerland:Springer, 2022, pp. 15–16. [113] Microhip. 8-Bit Microcontroller with 4K Bytes Flash. [Online]. Available:https://ww1.microchip.com/downloads/en/devicedoc/doc0265.pdf [114] Texas Instruments. LP3878-ADJ Datasheet. [Online]. Available: https://www.ti.com/product/zh-tw/LP3878-ADJ | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/97336 | - |
| dc.description.abstract | 本論文聚焦於射頻和毫米波(mmW)電路，系統和整合上的研究。本論文分為兩大部份，第一主部份介紹一個適用於39 GHz應用的2.2公里高速收發系統，第二主部份為應用於毫米波系統上的功率放大器(power amplifier)的研究。
本論文的第一主部份為一個於39-GHz 波段下的2.2公里高速無線傳輸系統。該系統包括使用 TX/RX 晶片並利用覆晶技術安裝在 IC 封裝基板上的發射器（TX）和接收器（RX）模組，這些模組是使用TX/RX晶片並利用覆晶技術安裝在IC封裝基板上，一對高增益主動天線，以及用於數據到圖形轉換的軟體定義無線電(Software-Defined Radio, SDR)模組。TX和RX主動天線都提供高達37 dB的天線增益(Antenna Gain)。使用覆晶技術組裝的TX模組提供15 dBm的飽和功率(Saturated Power, Psat)和13 dB的轉換增益（Conversion Gain, CG），而使用覆晶技術封裝的RX模組則提供18 dB 轉換增益。該即時視頻系統的特性已在戶外展示，這是首次實現公里等級距離的無人機應用39 GHz長距離傳輸。 本論文的第二主部份介紹了毫米波功率放大器的設計，這部份分別為展別展示兩個應用於$E$頻段和$W$頻段的段功率放大器（PA），該放大器採用16奈米鰭式場效電晶體(FinFET)技術製作，電晶體的轉換頻率（Transition frequency, fT）和最大振盪頻率（Maximum oscillation frequency, fmax) 分別為332 GHz和235 GHz。這個功率放大器採用低功耗設計方法，並且經過審慎的佈局設計，顯著減少了晶片面積。這種方法適合於相控陣系統中單端功率放大器的使用，特別是自動雷達應用，該應用需要在數位主導的FinFET技術中提供優越的性能。此功率放大器利用變壓器耦合技術進行級間連接，並採用緊湊的佈局技術，使功率放大器適合於毫米波（mmW）應用。該功率放大器在0.8 V的較低供電電壓和120 mA的電流消耗下，提供12-dBm 的Psat，22-dB的轉換增益，以及20.2%的功率增益效率（PAE）。功率放大器的核心晶片尺寸為525微米 x 310微米。 另一個毫米波功率放大器為一個使用65奈米CMOS製程製作的E頻段功率放大器，電晶體的ft$和fmax分別為281 GHz和196 GHz。這款功率放大器採用三級設計方法，使用共源共柵結構來擴展供電電壓以提高輸出功率。利用2路功率結合技術進一步提高輸出功率。此功率放大器利用變壓器耦合技術進行級間連接，並採用緊湊的佈局技術，使功率放大器適合於mmW應用。該功率放大器在1.2 V和2.4 V的多重供電電壓和150 mA及220 mA的電流消耗下，顯示了20.7-dBm的Psat，26.8-dB的增益，以及17.5%的PAE。功率放大器的核心晶片尺寸為800微米 x 360微米。 | zh_TW |
| dc.description.abstract | This dissertation focuses on the research of the RF and millimeter-wave circuit design and system architecture investigation. The dissertation comprises two main parts: the first part concentrates on the long-range millimeter-wave circuit system design, and the second part shows the research on the design of power amplifiers in millimeter-wave transmission systems.
In the first part of this dissertation, a 2.2-km high-speed transceiver system for 39 GHz applications is presented. The system includes transmitter (TX) and receiver (RX) modules, which are developed from TX/RX chips and flip-chip mounted on an IC package substrate, a pair of high-gain active antennas, and software-defined radio (SDR) modules for data-to-image conversion. Both the TX and RX active antenna provide up to 37 dB antenna gain. The presented flip-chip TX provides 15 dBm of saturated power and 13 dB of conversion gain (CG), while the flip-chip RX delivers 18 dB of CG. The real-time video system’s characteristics have been demonstrated outdoors, the first demonstration of a kilometer-scale long-range transmission at 39 GHz in UAV applications. The second part of this dissertation investigates the power amplifier design in millimeter-wave applications. Two PA designs in E-band and W-band PA are presented, respectively. The first PA focuses on the design of a low-supply voltage W-band power amplifier (PA) fabricated in 16-nm FinFET technology with transition frequency (fT) and maximum oscillation frequency (fmax) of 332 and 235 GHz, respectively. This PA adopts the low-power design approach, with a careful layout strategy to substantially reduce the occupied area. This approach suits the usage of single-end PA in phased-array systems, especially the automatic radar application, which requires superb performance in the digitally dominated fin field-effect transistor (FinFET) technology. This PA exploits the transformer coupling technique for inter-stage connection and compact layout techniques to make the PA suitable for millimeter-wave (mmW) applications. The PA provides a 12-dBm saturated output power (Psat), 22 dB transducer gain, and 20.2% of power-added efficiency (PAE) under a lower supply voltage of 0.8 V and current consumption of 120 mA. The PA occupies a core die size of 525 μm × 310 μm. Another millimeter-wave PA presented in this dissertation is a high-output power amplifier using the parallel power combining technique for E-band system. This E-band power amplifier (PA) is fabricated in 65-nm CMOS technology with transition frequency (fT) and maximum oscillation frequency (fmax) of 281 and 196 GHz, respectively. This PA adopts a three-stage design approach, using the cascade structure to extend the supply voltage to boost the output power. The 2-way power combining technique is exploited to further improve the output power. This PA exploits the transformer coupling technique for inter-stage connection and compact layout techniques to make the PA suitable for millimeter-wave (mmW) applications. The PA provides a 20.7-dBm saturated output power (Psat), 26.8 dB transducer gain, and 17.5% of power-added efficiency (PAE) at 75 GHz under a multiple supply voltage of 1.2 and 2.4 V and current consumption of 150 mA and 220 mA respectively. The PA occupies a core die size of 800 μm × 360 μm. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2025-05-01T16:04:25Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2025-05-01T16:04:26Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | Verification Letter from the Oral Examination Committee i
Acknowledgements iii 中文摘要 vi ABSTRACT viii Contents xi List of Figures xvii List of Tables xxxi Chapter 1 Introduction 1 1.1 Background and Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Literature Survey . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2.1 Review of Millimeter-Wave Transmission System at 28-, 39-, and 60-GHz Bands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2.2 Review of E-band Power Amplifier in Advanced CMOS Technology 8 1.3 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.3.1 Design and Implementation on the Real-Time Video Transmission System at 39 GHz . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.3.2 Design of E-band Power Amplifier in 16-nm FinFET technology . . 12 1.3.3 Design of 2-way high-output E-band Power Amplifier Design in 65-nm CMOS with Cascode Gain and Power Boosting and Shunt Capacitance Improvement . . . . . . . . . . . . . . . . . . . . . . . . 13 1.4 Organizations of This Dissertation . . . . . . . . . . . . . . . . . . . . . . . 14 Chapter 2 Design and Implementation on the Real-Time Video Transmission System at 39 GHz 15 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.2 System Link Budget Analysis . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3 System Building Blocks and Key Component Design . . . . . . . . . . . . . 22 2.3.1 TX Chip Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.3.2 RX Chip Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.3.3 Marchand Balun vs Transformer . . . . . . . . . . . . . . . . . . . 31 2.3.4 LO Distribution Network . . . . . . . . . . . . . . . . . . . . . . . 33 2.3.5 Quadrupler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2.3.6 Serial Peripheral Interface (SPI) and Digital-Analog Converter (DAC) for Bias Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . 37 2.3.7 Input/Output (IO) and Corresponding Electrostatic Discharge (ESD) Pads Arrangement in both TX and RX chip . . . . . . . . . . . . . 40 2.3.7.1 ESD circuits . . . . . . . . . . . . . . . . . . . . . . . . . 40 2.3.7.2 Tx chip IO . . . . . . . . . . . . . . . . . . . . . . . . . . 41 2.3.7.3 Rx chip IO . . . . . . . . . . . . . . . . . . . . . . . . . . 43 2.3.8 Flip-Chip Packaging and Modules Assembling . . . . . . . . . . . . 45 2.3.9 Transmitter and Receiver Antenna Modules . . . . . . . . . . . . . 49 2.3.10 Printed-Circuit-Board (PCB) Design in Long-Range Transceiver System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 2.3.10.1 PCB for differential IQ to complex signal PCB . . . . . . . 53 2.3.10.2 PCB for MCU and Power Management Unit (PMU) for flip-chip substrate . . . . . . . . . . . . . . . . . . . . . . 56 2.3.10.3 PCB for MCU and Power Management Unit (PMU) board for high-gain antenna . . . . . . . . . . . . . . . . . . . . 57 2.3.11 Software-Defined Radio (SDR) . . . . . . . . . . . . . . . . . . . . 57 2.4 Measurement Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 2.4.1 On-wafer Measurement of the TX and RX UDC . . . . . . . . . . . 59 2.4.1.1 TX On-wafer Measurement Results . . . . . . . . . . . . . 60 2.4.1.2 RX On-wafer Measurement Results . . . . . . . . . . . . . 62 2.4.1.3 DC power consumption of TX and RX chips . . . . . . . . 64 2.4.1.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . 65 2.4.1.5 PLL Measurement Results . . . . . . . . . . . . . . . . . . 66 2.4.2 Flip-Chip Modules Measurement . . . . . . . . . . . . . . . . . . . 67 2.4.3 Noise Temperature of RX Antenna . . . . . . . . . . . . . . . . . . 71 2.4.4 Field Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 72 2.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 2.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Chapter 3 Design of E-band Power Amplifier in 65-nm CMOS technology 79 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 3.2 Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 3.2.1 Bias and Device Size Selection . . . . . . . . . . . . . . . . . . . . 82 3.2.2 Gain, Driver and Power Stages Design . . . . . . . . . . . . . . . . 85 3.2.3 Cascode Power Stages Design and Input Matching Network (IMN) with Shunt Capacitance . . . . . . . . . . . . . . . . . . . . . . . . 92 3.2.4 Inter-Stage Transformer and Output Combiner . . . . . . . . . . . . 94 3.2.5 Inter-stage stability Analysis . . . . . . . . . . . . . . . . . . . . . 97 3.2.6 Input/Output (IO) and Corresponding Electrostatic Discharge (ESD) Pads Arrangement in 65-nm PA . . . . . . . . . . . . . . . . . . . . 100 3.2.7 Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 3.3 Measurements Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 3.3.1 DC Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 3.3.2 S-parameters Measurement . . . . . . . . . . . . . . . . . . . . . . 103 3.3.3 Large-signal Measurement . . . . . . . . . . . . . . . . . . . . . . 104 3.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 3.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Chapter 4 Design of E-band Power Amplifier in 16-nm FinFET Technology 113 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 4.2 FinFET Technology in mmW Application . . . . . . . . . . . . . . . . . . . 115 4.3 Size Selection and Neutralization Capacitance . . . . . . . . . . . . . . . . . 117 4.4 Gain, Driver and Power Stage Design . . . . . . . . . . . . . . . . . . . . . 119 4.5 mmW One-Way PA Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 4.5.1 Design of the Inter-Stage Transformer . . . . . . . . . . . . . . . . 122 4.6 mmW Two-Way Power Combining PA Design . . . . . . . . . . . . . . . . 125 4.6.1 Gain Boosting Input Matching Network (IMN) with Series Inductance (Series-L) and Shunt Capacitance (Shunt-C) . . . . . . . . . . 126 4.6.2 Efficiency Boosting Output Matching Network (OMN) with Shunt-C 128 4.6.3 Gain, Driver, and Power Stage Design . . . . . . . . . . . . . . . . 129 4.6.4 Transformer Matching with Proposed Technique . . . . . . . . . . . 130 4.6.5 Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 4.7 Input/Output and Electrostatic Discharge (ESD) Pad Arrangement in both FinFET PAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 4.8 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 4.8.1 One-Way PA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 4.8.1.1 DC Measurement . . . . . . . . . . . . . . . . . . . . . . 135 4.8.1.2 S-parameters Measurement . . . . . . . . . . . . . . . . . 135 4.8.1.3 Large-signal Measurement . . . . . . . . . . . . . . . . . . 136 4.8.2 Two-Way Power Combining PA . . . . . . . . . . . . . . . . . . . 138 4.8.2.1 DC Measurement . . . . . . . . . . . . . . . . . . . . . . 138 4.8.2.2 S-parameter Measurement . . . . . . . . . . . . . . . . . . 139 4.8.2.3 Large-signal Measurement . . . . . . . . . . . . . . . . . . 140 4.9 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 4.10 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 Chapter 5 Conclusion 149 Appendix A — Schematic of PCB in the 39-GHz TRX system 153 A.1 Schematic of PCB for the microcontroller (MCU) and power management unit (PMU) for the flip-chip modules . . . . . . . . . . . . . . . . . . . . . . 153 A.2 Schematic of PCB for the MCU and PMU for the high-gain antenna . . . . . 164 A.3 Schematic of the second version of the PCB for the microcontroller (MCU) and power management unit (PMU) for the flip-chip modules . . . . . . . . 173 A.4 PCB layouts of 39-GHz TRX chip with wire-bonding . . . . . . . . . . . . . 176 Appendix B — Derive of Equations 181 Appendix C — Loop filter analysis of on-chip PLL in 39 GHz TRX system 185 References 187 | - |
| dc.language.iso | en | - |
| dc.subject | 收發器 | zh_TW |
| dc.subject | Ka-頻段 | zh_TW |
| dc.subject | W-頻段 | zh_TW |
| dc.subject | E-頻段 | zh_TW |
| dc.subject | 鰭式場效電晶體 | zh_TW |
| dc.subject | 覆晶封裝技術 | zh_TW |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | 毫米波 | zh_TW |
| dc.subject | 互補式金氧半場效電晶體 | zh_TW |
| dc.subject | Ka-band | en |
| dc.subject | CMOS | en |
| dc.subject | transceiver | en |
| dc.subject | millimeter-wave | en |
| dc.subject | power amplifier | en |
| dc.subject | flip-chip package | en |
| dc.subject | FinFET | en |
| dc.subject | E-band | en |
| dc.subject | W-band | en |
| dc.title | 應用於射頻及毫米波傳輸電路和系統設計與實現以及毫米波互補式金氧半場效電晶體功率放大器設計之研究 | zh_TW |
| dc.title | Research on Transceiver Circuit and System Design and Implementation in RF and Millimeter-Wave Application and Millimeter-Wave Power Amplifier Design in CMOS | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 113-1 | - |
| dc.description.degree | 博士 | - |
| dc.contributor.oralexamcommittee | 黃天偉;林坤佑;周錫增;盧信嘉;吳宗澤;蔡政翰;邱煥凱;張鴻埜 | zh_TW |
| dc.contributor.oralexamcommittee | Tian-Wei Huang;Kun-You Lin;Hsi-Tseng Chou;Hsin-Chia Lu;Chung-Tse Michael Wu;Jeng-Han Tsai;Hwann-Kaeo Chiou;Hong-Yeh Chang | en |
| dc.subject.keyword | 互補式金氧半場效電晶體,收發器,毫米波,功率放大器,覆晶封裝技術,鰭式場效電晶體,E-頻段,W-頻段,Ka-頻段, | zh_TW |
| dc.subject.keyword | CMOS,transceiver,millimeter-wave,power amplifier,flip-chip package,FinFET,E-band,W-band,Ka-band, | en |
| dc.relation.page | 195 | - |
| dc.identifier.doi | 10.6342/NTU202500024 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2025-02-07 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電信工程學研究所 | - |
| dc.date.embargo-lift | 2025-05-02 | - |
| 顯示於系所單位： | 電信工程學研究所 | |
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