閘汲極變壓器回授低雜訊放大器與應用於天文接收機之G頻段頻率二倍頻器之研究

Abstract

本論文分為三個主要部分。第一部分介紹了使用90奈米金氧半場效電晶體製程之應用於通訊系統的超寬頻低雜訊放大器設計與量測結果，。第二部分描述了使用同樣製程的應用於天文接收器設計的低功耗Ka頻段極低功耗低雜訊放大器設計與量測結果。最後一部分應用於天文接收機的90奈米G頻段倍頻器之設計與結果。 第一部分著重於用於通訊系統的超寬頻低雜訊放大器的設計。為了擴展帶寬，每級採用了閘極-汲極變壓器回授技術。使用源極去耦來實現同時的雜訊和阻抗匹配，並採用多階匹配來實現更寬的輸入匹配和級間匹配。測試結果顯示該設計具有良好的性能，在13.3至40.3 GHz的4-dB帶寬內，達到15.6 dB的峰值增益，雜訊指數範圍為2.3至4.8 dB。該設計的直流功耗僅為11.7 mW。晶片總面積為0.43平方毫米。 第二部分展示了一款為天文接收器設計的低功耗Ka頻段低雜訊放大器。為了擴展帶寬，每級同樣採用了閘極-汲極變壓器回授技術，並通過源極去耦實現同時的雜訊和阻抗匹配，以及多階匹配來增強輸入和級間匹配。此外，採用電流復用技術來提升整體增益。測試結果顯示，所設計的低雜訊放大器在11.1 GHz的3-dB帶寬內實現了16.9 dB的小信號增益。在32 GHz下，其雜訊指數為3.8 dB，功耗僅為4.97 mW。整體晶片面積為0.49平方毫米。 最後一部分介紹了為天文接收器電路設計的G頻段倍頻器。該倍頻器架構採用了推推式結構，並使用馬遜平衡器以改善相位相反且幅度相同的信號。此外，採用了浮接體技術來增強高頻性能。測試結果顯示，所提出的倍頻器實現了-11.9 dB的轉換增益，3-dB帶寬達到40 GHz。晶片總面積為0.315平方毫米。

This thesis consists of three main parts. The first part presents the design and measurement results of an ultra-wideband low noise amplifier fabricated by 90-nm CMOS process for communication system. The second part describes the design and measurement results of a low power Ka-band low-noise amplifier (LNA) fabricated by 90-nm CMOS process for astronomical receiver. The last chapter discusses the design and measurement of a G-band frequency doubler fabricated by 90-nm CMOS process for astronomical receiver. The first part focuses on an ultra-wideband low-noise amplifier for communication system. To extend the bandwidth, the gate-drain transformer-feedback technique is employed at each stage. Source degeneration is utilized for simultaneous noise and impedance matching. Multi-order matching for wider input matching and inter-stage matching. Measurement results demonstrate competitive performance, with a peak gain of 15.6 dB and a noise figure ranging from 2.3 to 4.8 dB across a 4-dB bandwidth spanning from 13.3 to 40.3 GHz. The DC power consumption of the design is only 11.7 mW. The total area with pads is 0.43 mm2. The second part presents an low power Ka-band low noise amplifier (LNA) designed for astronomical receivers. To extend the bandwidth, the gate-drain transformer-feedback technique is employed at each stage. Source degeneration is utilized for simultaneous noise and impedance matching. Multi-order matching for wider input matching and inter-stage matching. The current reused use to enhance the overall gain. The measurement results demonstrate that the proposed low noise amplifier achieves a small signal gain of 16.9 dB with 3- dB bandwidth of 11.1 GHz. Moreover, the LNA presents a noise figure of 3.8 dB at 32 GHz with a low power consumption of 4.97 mW. The total chip area is 0.49 mm2. The last part presents introduces G-band frequency doubler designed for circuit in astronomical receiver. The frequency doubler architecture uses push-push structure using marchard balun to improve signals with opposite phases and the same amplitude and adding body-floating to enhance high frequency performance. The measurement results show that the proposed frequency doubler achieves a conversion gain of -11.9 dB with 3-dB bandwidth of 40 GHz. The total chip area is 0.315 mm2.