應用於雙向相位陣列系統寬頻毫米波相移器與應用於第五代行動通訊毫米波系統寬頻疊接式功率放大器之研究

Abstract

這篇論文由三個主要部分組成，其中兩部分是應用在W頻段和第五代移動通信系統的毫米波相移器，另一部分是應用在第五代移動通信系統的Ka頻段功率放大器。 第一部分介紹了一個使用65奈米CMOS製程的W-band 5位元雙向開關型相移器。首先使用開關型相移器實現11.25°、22.5°和45°的相移單元。接著，使用改良式反射型相移器實現90°相移單元。此外，為了減少相移器的損耗及不同相位狀態下的振幅差異，添加了一個雙向可變增益放大器。透過電流鏡調整增益，可以減少相移器的損耗及不同相位狀態下的振幅差異。為實現寬頻180°相位移性能，在BDVGA的輸出匹配變壓器中添加了雙刀單擲（DPST）開關。然而，量測結果與模擬結果有些差異，此部分差異將在討論部分中進行探討。 在第二部分中，介紹了一個採用0.15微米GaAs pHEMT製程的Ka頻段功率放大器。採用疊接FET架構來減緩增益隨頻率的變化，以實現寬頻帶的性能。在疊接FET架構中，結合接地電容可使所設計的頻率範圍內MAG曲線的頻率敏感性降低。疊接FET架構也使最佳負載阻抗隨頻率的變化減小，透過輸出匹配網路可以獲得寬頻功率性能。輸入和級間匹配網路針對增加小信號增益平坦度做設計，以實現寬頻小信號響應。然而，WIN Semiconductors提供的模擬模型不準確，導致量測時發生頻帶內的震盪。這個問題將會在討論部分中進行詳細討論。 第三部分介紹了一個使用90奈米CMOS製程的Ka頻段雙向相移器。首先設計了一個具有低幅度不平衡的寬頻正交生成器。然後實現了一個具有180°相移功能的雙向可變增益放大器，以調整每個I/Q信號的增益。可變增益放大器的增益控制範圍足以提供11.25°的解析度。因此，這個5位元相移器具有寬頻增益性能以及低均方根相位和振幅誤差。然而，量測結果與模擬結果有些差異，此差異將在討論部分中進行探討。

This thesis consists of three main parts, two of which are millimeter-wave phase shifters for the W-band and the fifth-generation mobile communication system, and the other is a Ka-band power amplifier for the fifth-generation mobile communication system. In the first part, a 70-95 GHz 5-bit switch-type phase shifter implemented in a 65-nm CMOS process is presented. First, switch-type phase shifters are used to achieve 11.25°, 22.5°, and 45° phase shift cells. Then, a bi-phase switching reflection-type topology is used for a 90° phase shift bit. Furthermore, to reduce the loss of the phase shifter and the amplitude differences among the different phase states, a bi-directional variable gain amplifier (BDVGA) is added. By adjusting the gain via a current mirror, the loss of the phase shifter and the amplitude differences among the different phase states can be reduced. Moreover, to achieve wideband 180° phase shift performance, a double-pole single-through (DPST) switch is added to the output matching transformer of the BDVGA. However, the measured results differ from the simulation results; this discrepancy will be discussed. In the second part, a Ka-band power amplifier fabricated in 0.15-μm GaAs pHEMT process is presented. The stacked-FET topology was adopted for mitigation of the gain roll-off with frequency to achieve similar performance at a wide frequency band. In the stacked-FET configuration, the combination of the grounding capacitance could also effectively make the MAG profile less frequency-sensitive in the frequency range of interest. Then, the output matching network is adopted to obtain wide-band power performance. The input and inter-stage matching network is designed for small signal gain-flatness to achieve wide-band small signal response. However, the inaccuracies in the simulation model provided by WIN Semiconductors resulted in in-band oscillations. This issue will be examined in more detail. In the third part, a Ka-band bi-directional phase shifter implemented in a 90-nm CMOS process is presented. First, a wide-band quadrature generator with low amplitude imbalance is designed. Then, a bi-directional variable gain amplifier with half-cycle phase shift capability is implemented to adjust each gain of I/Q signals. The gain control range of the variable gain amplifier is sufficient to provide a resolution of 11.25°. As a result, the 5-bit phase shifter has a wide-band gain performance as well as low root-mean-square phase and amplitude errors. However, the measured results differ from the simulation results; this discrepancy will be discussed.